Tcwg-commits March 2017

tcwg-commits@lists.linaro.org

7 participants
3096 discussions

[gcc] branch master updated (8c4c6b6 -> 7a213a4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 8c4c6b6 [aarch64] Fix typo in aarch64.opt (dummping -> dumping). new 7a213a4 2017-03-17 Jerry DeLisle <jvdelisle(a)gcc.gnu.org> The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/fortran/ChangeLog | 5 +++++ gcc/fortran/openmp.c | 6 +++--- 2 files changed, 8 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[lldb] branch master updated (b923e0a -> 80179ce)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lldb. from b923e0a CMake requires normalized paths when appending. new 80179ce executables should be validated before spawning subprocesses The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: packages/Python/lldbsuite/test/dotest.py | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[llvm] branch master updated (d1a05a8 -> 5edba1d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from d1a05a8 [Bitcode] Add compatibility test for the 4.0 release new 5edba1d [PGO] Value profile for size of memory intrinsic calls The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../Instrumentation/PGOInstrumentation.cpp | 27 ++++++++-- .../Inputs/memop_size_annotation.proftext | 27 ++++++++++ .../Transforms/PGOProfile/memop_size_annotation.ll | 59 ++++++++++++++++++++++ 3 files changed, 108 insertions(+), 5 deletions(-) create mode 100644 test/Transforms/PGOProfile/Inputs/memop_size_annotation.proftext create mode 100644 test/Transforms/PGOProfile/memop_size_annotation.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[llvm] branch master updated (20afc5b -> d1a05a8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 20afc5b [SelectionDAG] Add SelectionDAG.computeKnownBits test support [...] new d1a05a8 [Bitcode] Add compatibility test for the 4.0 release The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/Bitcode/{compatibility.ll => compatibility-4.0.ll} | 11 ++++------- test/Bitcode/compatibility-4.0.ll.bc | Bin 0 -> 16400 bytes 2 files changed, 4 insertions(+), 7 deletions(-) copy test/Bitcode/{compatibility.ll => compatibility-4.0.ll} (99%) create mode 100644 test/Bitcode/compatibility-4.0.ll.bc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[llvm] branch master updated (ec1b680 -> 20afc5b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from ec1b680 [x86] avoid adc/sbb assert when both sides of add are zexted [...] new 20afc5b [SelectionDAG] Add SelectionDAG.computeKnownBits test support [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 20 ++++++++++++++++++++ test/CodeGen/X86/known-bits-vector.ll | 12 ++---------- 2 files changed, 22 insertions(+), 10 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[binutils-gdb] branch master updated (0dd6ae2 -> d9cb6cd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 0dd6ae2 Fix displaying the value associated a GNU BUILD note that use [...] new 4ac4bb6 arm-linux-nat.c: Use ptid from regcache instead of inferior_ptid new 9ac8a7c arm-nbsd-nat: Use ptid from regcache instead of inferior_ptid new 317cd49 bsd-uthread: Use ptid from regcache instead of inferior_ptid new 11a3371 corelow: Use ptid from regcache instead of inferior_ptid new 00204cf hppa-linux-nat: Use ptid from regcache instead of inferior_ptid new 1079902 hppa-nbsd-nat: Use ptid from regcache instead of inferior_ptid new bbe1eef hppa-obsd-nat: Use ptid from regcache instead of inferior_ptid new aac12e2 i386-bsd-nat: Use ptid from regcache instead of inferior_ptid new 1afaf9f i386-darwin-nat: Use ptid from regcache instead of inferior_ptid new d9cb6cd i386-gnu-nat: Use ptid from regcache instead of inferior_ptid The 10 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/ChangeLog | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++ gdb/arm-linux-nat.c | 16 ++++++++-------- gdb/arm-nbsd-nat.c | 20 +++++++++---------- gdb/bsd-uthread.c | 20 +++++++++++++++++-- gdb/corelow.c | 11 ++++++----- gdb/hppa-linux-nat.c | 15 +++++---------- gdb/hppa-nbsd-nat.c | 22 ++++++++++----------- gdb/hppa-obsd-nat.c | 20 ++++++++----------- gdb/i386-bsd-nat.c | 37 ++++++++++++++++------------------- gdb/i386-darwin-nat.c | 4 ++-- gdb/i386-gnu-nat.c | 12 ++++++------ 11 files changed, 142 insertions(+), 88 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[llvm] branch master updated (2af0da9 -> ec1b680)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 2af0da9 Store Arguments in a flat array instead of an iplist new 6399417 Fix wasm build after arg_begin iterator type change new ec1b680 [x86] avoid adc/sbb assert when both sides of add are zexted [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 2 +- lib/Target/X86/X86ISelLowering.cpp | 8 +++++-- test/CodeGen/X86/avx512-adc-sbb.ll | 27 ++++++++++++++++++++++ 3 files changed, 34 insertions(+), 3 deletions(-) create mode 100644 test/CodeGen/X86/avx512-adc-sbb.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[binutils-gdb] branch master updated (9bcbdca -> 0dd6ae2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 9bcbdca PR remote/21188: Fix remote serial timeout new 0dd6ae2 Fix displaying the value associated a GNU BUILD note that use [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: binutils/ChangeLog | 5 +++++ binutils/readelf.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[llvm] branch master updated (5dfb7d0 -> 2af0da9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 5dfb7d0 [X86] Add SelectionDAG.computeKnownBits test showing inabilit [...] new 17dcd3d Only unswitch loops with uniform conditions new 2af0da9 Store Arguments in a flat array instead of an iplist The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/IR/Argument.h | 14 ++-- include/llvm/IR/Function.h | 24 +++--- include/llvm/Transforms/IPO/PassManagerBuilder.h | 1 + include/llvm/Transforms/Scalar.h | 3 +- lib/IR/Core.cpp | 17 ++--- lib/IR/Function.cpp | 60 +++++++++++---- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 + lib/Transforms/IPO/PassManagerBuilder.cpp | 5 +- lib/Transforms/Scalar/LoopUnswitch.cpp | 23 +++++- .../LoopUnswitch/AMDGPU/divergent-unswitch.ll | 85 ++++++++++++++++++++++ .../LoopUnswitch}/AMDGPU/lit.local.cfg | 0 11 files changed, 184 insertions(+), 50 deletions(-) create mode 100644 test/Transforms/LoopUnswitch/AMDGPU/divergent-unswitch.ll copy test/{Analysis/CostModel => Transforms/LoopUnswitch}/AMDGPU/lit.local.cfg (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[llvm] branch master updated (d255a95 -> 5dfb7d0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from d255a95 [AArch64] Use alias analysis in the load/store optimization pass. new 5dfb7d0 [X86] Add SelectionDAG.computeKnownBits test showing inabilit [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/CodeGen/X86/known-bits-vector.ll | 61 +++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

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Tcwg-commits March 2017