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from 61ce026 [WebAssembly] Configure codegen to legalize f16 values.
new 94ebcf7 Fix an obvious bug in SampleProfileReaderGCC.
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lib/ProfileData/SampleProfReader.cpp | 8 +++----
.../SampleProfile/Inputs/indirect-call.afdo | Bin 0 -> 1744 bytes
test/Transforms/SampleProfile/indirect-call-gcc.ll | 26 +++++++++++++++++++++
3 files changed, 29 insertions(+), 5 deletions(-)
create mode 100644 test/Transforms/SampleProfile/Inputs/indirect-call.afdo
create mode 100644 test/Transforms/SampleProfile/indirect-call-gcc.ll
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from 5e33d8f PR target/70465 * reg-stack.c (emit_swap_insn): Treat (floa [...]
new 8d7a501 Support WORD_REGISTER_OPERATIONS requirements in simplify_ope [...]
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gcc/ChangeLog | 6 ++++++
gcc/lra-constraints.c | 21 ++++++++++++++++-----
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unknown user pushed a change to branch users/aoliva/SFN
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from 07b92e3 LVU: emit dwarf loc insn before data-output pseudos
new 769ef0e LVU: zero-initialize line info on asm source
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gas/dwarf2dbg.c | 2 ++
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from 25890fc Fix gas/all/err-sizeof.s for cris*-*-*
new 758d96d Align .gnu_debuglink sections on a 4-byte boundary.
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bfd/ChangeLog | 6 ++++++
bfd/opncls.c | 7 +++++++
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from 72aaa20 Add IP_RECVFRAGSIZE from Linux 4.10.
new bf0b536 Use Linux 4.10 in build-many-glibcs.py.
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ChangeLog | 5 +++++
scripts/build-many-glibcs.py | 2 +-
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from 86f5bb8 * gcc.dg/pr61441.c: Use dg-add-options ieee.
new 5e33d8f PR target/70465 * reg-stack.c (emit_swap_insn): Treat (floa [...]
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gcc/ChangeLog | 7 +++++++
gcc/reg-stack.c | 17 ++++++++++++-----
gcc/testsuite/ChangeLog | 5 +++++
gcc/testsuite/gcc.target/i386/pr70465-2.c | 25 +++++++++++++++++++++++++
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create mode 100644 gcc/testsuite/gcc.target/i386/pr70465-2.c
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from 458f2a4 [X86][SSE] getTargetConstantBitsFromNode - insert constant bi [...]
new 6ef315b [DAGCombiner] revert r295336
new 61ce026 [WebAssembly] Configure codegen to legalize f16 values.
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lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 27 ++---
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 5 +
test/CodeGen/AArch64/load-combine-big-endian.ll | 6 +-
test/CodeGen/AArch64/load-combine.ll | 7 +-
test/CodeGen/AMDGPU/insert_vector_elt.ll | 31 +++--
test/CodeGen/ARM/fp16-promote.ll | 12 +-
test/CodeGen/ARM/load-combine-big-endian.ll | 11 +-
test/CodeGen/ARM/load-combine.ll | 12 +-
test/CodeGen/PowerPC/ppc64le-aggregates.ll | 5 +-
test/CodeGen/WebAssembly/f16.ll | 28 +++++
test/CodeGen/X86/load-combine.ll | 133 ++++++++++++++++-----
11 files changed, 203 insertions(+), 74 deletions(-)
create mode 100644 test/CodeGen/WebAssembly/f16.ll
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from 5eef350 [X86][SSE] Use APInt::getBitsSet() instead of APInt::getLowBi [...]
new 458f2a4 [X86][SSE] getTargetConstantBitsFromNode - insert constant bi [...]
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lib/Target/X86/X86ISelLowering.cpp | 33 +++++++++++++++------------------
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from 55f6fd8 2017-02-22 Richard Biener <rguenther(a)suse.de>
new df6b27b * ChangeLog: Add missing entry. * testsuite/ChangeLog: Ditto.
new 86f5bb8 * gcc.dg/pr61441.c: Use dg-add-options ieee.
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gcc/ChangeLog | 7 +++++++
gcc/testsuite/ChangeLog | 11 ++++++++++-
gcc/testsuite/gcc.dg/pr61441.c | 1 +
3 files changed, 18 insertions(+), 1 deletion(-)
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from 45af332 Remove superfluous initializer. The following fully-covered s [...]
new a745be5 [OpenCL] r600 needs OpenCL kernel calling convention
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lib/Sema/SemaType.cpp | 2 +-
test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
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