Tcwg-commits December 2017

tcwg-commits@lists.linaro.org

7 participants
2701 discussions

[gcc] branch master updated (045f03f1454 -> 78799569824)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 045f03f1454 2017-12-20 Thomas Koenig <tkoenig(a)gcc.gnu.org> new 78799569824 2017-12-20 François Dumont <fdumont(a)gcc.gnu.org> The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: libstdc++-v3/ChangeLog | 18 +++++++ libstdc++-v3/include/debug/map.h | 18 +++++++ libstdc++-v3/include/debug/multimap.h | 15 ++++++ libstdc++-v3/include/debug/unordered_map | 60 +++++++++++++++++++--- .../23_containers/map/modifiers/insert/dr2354.cc | 7 +++ .../multimap/modifiers/insert/dr2354.cc | 7 +++ .../23_containers/unordered_map/insert/dr2354.cc | 7 +++ .../unordered_multimap/insert/dr2354.cc | 7 +++ 8 files changed, 132 insertions(+), 7 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[binutils-gdb] branch master updated (396d3980f5 -> 21a186f280)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 396d3980f5 [Cell/B.E.] Fix regression due to gdbarch_significant_addr_bit new 21a186f280 RISC-V: Add compressed instruction hints, and a few misc cleanups. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gas/ChangeLog | 15 +++++++++++ gas/config/tc-riscv.c | 3 +++ gas/testsuite/gas/riscv/c-nonzero-imm.d | 3 +++ gas/testsuite/gas/riscv/c-nonzero-imm.l | 2 ++ gas/testsuite/gas/riscv/c-nonzero-imm.s | 3 +++ gas/testsuite/gas/riscv/c-nonzero-reg.d | 3 +++ gas/testsuite/gas/riscv/c-nonzero-reg.l | 4 +++ gas/testsuite/gas/riscv/c-nonzero-reg.s | 3 +++ gas/testsuite/gas/riscv/c-zero-imm-64.d | 11 ++++++++ gas/testsuite/gas/riscv/c-zero-imm-64.s | 4 +++ gas/testsuite/gas/riscv/c-zero-imm.d | 16 +++++++++++ gas/testsuite/gas/riscv/c-zero-imm.s | 10 +++++++ gas/testsuite/gas/riscv/c-zero-reg.d | 20 ++++++++++++++ gas/testsuite/gas/riscv/c-zero-reg.s | 13 +++++++++ opcodes/ChangeLog | 11 ++++++++ opcodes/riscv-opc.c | 48 ++++++++++++++++++++++++--------- 16 files changed, 156 insertions(+), 13 deletions(-) create mode 100644 gas/testsuite/gas/riscv/c-nonzero-imm.d create mode 100644 gas/testsuite/gas/riscv/c-nonzero-imm.l create mode 100644 gas/testsuite/gas/riscv/c-nonzero-imm.s create mode 100644 gas/testsuite/gas/riscv/c-nonzero-reg.d create mode 100644 gas/testsuite/gas/riscv/c-nonzero-reg.l create mode 100644 gas/testsuite/gas/riscv/c-nonzero-reg.s create mode 100644 gas/testsuite/gas/riscv/c-zero-imm-64.d create mode 100644 gas/testsuite/gas/riscv/c-zero-imm-64.s create mode 100644 gas/testsuite/gas/riscv/c-zero-imm.d create mode 100644 gas/testsuite/gas/riscv/c-zero-imm.s create mode 100644 gas/testsuite/gas/riscv/c-zero-reg.d create mode 100644 gas/testsuite/gas/riscv/c-zero-reg.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[gcc] branch aoliva/testme updated (25c65cd148f -> 1765fd50cff)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch aoliva/testme in repository gcc. discards 25c65cd148f [SFN] debug markers before labels no more adds edcf99db18d PR tree-optimization/83444 * tree-ssa-strlen.c (strlen_ch [...] adds 24e3b8216bf PR middle-end/77608 - missing protection on trivially detec [...] adds 2638400fffd PR tree-optimization/83477 * tree-ssa-threadedge.c (recor [...] adds c3fe3d1de63 PR c++/82231 * g++.dg/cpp1z/nontype-auto14.C: New test. adds 504b0b7d01e * gimple-ssa-sprintf.c (format_directive): Use inform_n in [...] adds 2ab08fb4d2a Fix last ChangeLog entry date. adds d6449ac4f80 Fix sharing in translate_isl_ast_node_for adds fad87f75040 PR target/82975 * gcc.dg/pr82975.c: Only add -mtune=corte [...] adds 74744ce39b3 PR c++/83394 - always_inline vs. noinline no longer diagnos [...] adds caf629d3058 /cp 2017-12-19 Paolo Carlini <paolo.carlini(a)oracle.com> adds 9f2a98167e0 Daily bump. adds 3c56e0c18cd Don't call targetm.calls.static_chain in non-static function adds 29ca66eca82 Enable VPCLMULQDQ support adds daa6dcb60d8 Add two test-cases for (PR middle-end/82404). adds aed50899d62 PR c++/83490 * calls.c (compute_argument_addresses): Igno [...] adds e9f51e5ea0b [arm] PR target/82975: Guard against reg_renumber being NUL [...] adds 2f16b9fa9d9 * gcc-interface/trans.c (Loop_Statement_to_gnu): Use IN_RA [...] adds 9e78b2a069b 2017-12-20 Paolo Carlini <paolo.carlini(a)oracle.com> adds a40890c9b37 * config/visium/constraints.md (J, K, L): Use IN_RANGE mac [...] adds ce8798a65c6 [aarch64][libstdc++] Use __ARM_BIG_ENDIAN instead of __AARC [...] adds bb36bb09ffb [arm] PR target/83105: Minor change of default CPU for arm- [...] adds 74e98ab35b9 [arm][doc] Document accepted -march=armv8.3-a extension options adds 9a0a7299115 Fix multiple_p for two non-poly_ints adds bd39703a467 Add a gen_int_shift_amount helper function adds bbad7cd0bcb poly_int: rtx constants adds 8672ee56bb5 poly_int: tree constants adds 28eeb1470b8 poly_int: dump routines adds 1aa31a46551 poly_int: create_integer_operand adds e524465ae90 poly_int: TRULY_NOOP_TRUNCATION adds a14d43f8e9f poly_int: REG_OFFSET adds de41115b4fe poly_int: DWARF locations adds fff35079417 poly_int: fold_ctor_reference adds 2c7ce6611de poly_int: same_addr_size_stores_p adds ecc647e7b41 poly_int: indirect_refs_may_alias_p adds fe60c82c4b0 poly_int: ao_ref and vn_reference_op_t adds 370ad826add poly_int: dse.c adds e9b0961e5df poly_int: rtx_addr_can_trap_p_1 adds 711f137f646 poly_int: MEM_OFFSET and MEM_SIZE adds a4686d0a18d poly_int: lra frame offsets adds 82ede1f8efa poly_int: store_bit_field bitrange adds a20d1a58088 poly_int: extract_bit_field bitrange adds 6ece34cb303 poly_int: C++ bitfield regions adds 2d8ada9af84 poly_int: store_field & co adds ece84bf0610 poly_int: ira subreg liveness tracking adds 9edf7ea885d poly_int: SUBREG_BYTE adds b3d467b743a poly_int: operand_subword adds e1b783f6bb1 poly_int: DWARF CFA offsets adds 3bed7476767 poly_int: ipa_parm_adjustment adds f3c2a387b9c poly_int: get_ref_base_and_extent adds 773078cb3a9 poly_int: get_addr_base_and_unit_offset adds 1aeea61f353 poly_int: aff_tree adds 08454aa5f8a poly_int: symbolic_number adds 2f048e66af3 poly_int: pointer_may_wrap_p adds fbc666b8b0c poly_int: get_inner_reference_aff adds 73bf92b3a6e poly_int: expand_debug_expr adds eaa09bfd8a4 poly_int: get_object_alignment_2 adds e61263f2e72 poly_int: store merging adds d71c73164c3 [SFN] debug markers before labels no more new 1765fd50cff [SFN] propagate single-nondebug-stmt's side effects to encl [...] This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (25c65cd148f) \ N -- N -- N refs/heads/aoliva/testme (1765fd50cff) You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 1011 ++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 11 +- gcc/ada/gcc-interface/decl.c | 4 +- gcc/ada/gcc-interface/misc.c | 2 +- gcc/ada/gcc-interface/trans.c | 5 +- gcc/alias.c | 68 +- gcc/asan.c | 3 +- gcc/builtins.c | 85 +- gcc/c-family/c-semantics.c | 9 + gcc/caller-save.c | 2 +- gcc/calls.c | 26 +- gcc/calls.h | 1 + gcc/cfgcleanup.c | 19 +- gcc/cfgexpand.c | 53 +- gcc/combine.c | 102 +- gcc/common/config/i386/i386-common.c | 23 +- gcc/config.gcc | 13 +- gcc/config/arm/arm.h | 5 +- gcc/config/i386/cpuid.h | 1 + gcc/config/i386/driver-i386.c | 5 +- gcc/config/i386/i386-builtin.def | 5 + gcc/config/i386/i386-c.c | 2 + gcc/config/i386/i386.c | 20 +- gcc/config/i386/i386.h | 2 + gcc/config/i386/i386.opt | 6 +- gcc/config/i386/immintrin.h | 2 + gcc/config/i386/sse.md | 16 + gcc/config/i386/vpclmulqdqintrin.h | 108 +++ gcc/config/mips/mips.c | 2 +- gcc/config/spu/spu.c | 2 +- gcc/config/tilegx/tilegx.c | 2 +- gcc/config/visium/constraints.md | 6 +- gcc/config/visium/predicates.md | 2 +- gcc/config/visium/visium.c | 4 +- gcc/cp/ChangeLog | 16 + gcc/cp/cp-tree.h | 2 + gcc/cp/decl.c | 2 +- gcc/cp/decl2.c | 69 +- gcc/cp/parser.c | 6 +- gcc/cp/typeck2.c | 13 +- gcc/cse.c | 56 +- gcc/cselib.c | 18 + gcc/dce.c | 13 +- gcc/df-scan.c | 3 +- gcc/doc/generic.texi | 11 + gcc/doc/invoke.texi | 10 +- gcc/doc/match-and-simplify.texi | 2 +- gcc/doc/rtl.texi | 51 +- gcc/doc/tm.texi | 15 +- gcc/doc/tm.texi.in | 2 + gcc/dse.c | 255 +++-- gcc/dumpfile.c | 21 + gcc/dumpfile.h | 3 + gcc/dwarf2cfi.c | 182 ++-- gcc/dwarf2out.c | 201 ++-- gcc/dwarf2out.h | 13 +- gcc/emit-rtl.c | 375 +++++--- gcc/emit-rtl.h | 17 +- gcc/explow.c | 20 +- gcc/expmed.c | 369 ++++--- gcc/expmed.h | 13 +- gcc/expr.c | 190 ++-- gcc/expr.h | 9 + gcc/final.c | 5 +- gcc/fold-const.c | 174 +++- gcc/fold-const.h | 4 +- gcc/function.c | 13 +- gcc/fwprop.c | 2 +- gcc/genattrtab.c | 1 + gcc/genemit.c | 6 + gcc/gengenrtl.c | 12 +- gcc/gengtype.c | 7 + gcc/genpeep.c | 3 + gcc/genrecog.c | 42 +- gcc/gensupport.c | 15 +- gcc/gimple-expr.h | 1 + gcc/gimple-fold.c | 74 +- gcc/gimple-fold.h | 3 +- gcc/gimple-ssa-sprintf.c | 14 +- gcc/gimple-ssa-store-merging.c | 174 ++-- gcc/gimple-ssa-strength-reduction.c | 4 +- gcc/gimple-ssa-warn-restrict.c | 11 +- gcc/gimplify.c | 2 +- gcc/graphite-isl-ast-to-gimple.c | 4 +- gcc/hooks.c | 4 +- gcc/hooks.h | 2 +- gcc/ifcvt.c | 8 +- gcc/inchash.h | 16 + gcc/ipa-param-manipulation.c | 27 +- gcc/ipa-param-manipulation.h | 2 +- gcc/ipa-polymorphic-call.c | 69 +- gcc/ipa-prop.c | 53 +- gcc/ira-conflicts.c | 7 +- gcc/ira-lives.c | 2 +- gcc/ira.c | 59 +- gcc/jump.c | 9 +- gcc/loop-invariant.c | 7 + gcc/lower-subreg.c | 14 +- gcc/lra-assigns.c | 6 +- gcc/lra-constraints.c | 42 +- gcc/lra-eliminations.c | 114 +-- gcc/lra-int.h | 14 +- gcc/lra-remat.c | 8 +- gcc/lra-spills.c | 2 +- gcc/lra.c | 6 +- gcc/lto-streamer-out.c | 8 + gcc/machmode.h | 9 +- gcc/match.pd | 28 +- gcc/omp-low.c | 2 +- gcc/optabs.c | 78 +- gcc/optabs.h | 19 +- gcc/poly-int-types.h | 12 + gcc/poly-int.h | 2 +- gcc/postreload.c | 4 +- gcc/pretty-print.c | 24 + gcc/pretty-print.h | 13 +- gcc/print-rtl.c | 65 +- gcc/print-tree.c | 12 + gcc/read-rtl-function.c | 8 +- gcc/read-rtl.c | 6 +- gcc/recog.c | 16 +- gcc/regcprop.c | 8 +- gcc/reginfo.c | 10 +- gcc/reload.c | 9 +- gcc/reload1.c | 21 +- gcc/rtl-tests.c | 57 ++ gcc/rtl.c | 21 +- gcc/rtl.def | 5 +- gcc/rtl.h | 206 +++- gcc/rtlanal.c | 238 +++-- gcc/rtlhash.c | 7 + gcc/rtlhooks.c | 4 +- gcc/simplify-rtx.c | 272 ++++-- gcc/stor-layout.c | 53 +- gcc/target.def | 19 +- gcc/targhooks.c | 9 + gcc/targhooks.h | 3 + gcc/testsuite/ChangeLog | 67 ++ gcc/testsuite/c-c++-common/Warray-bounds-3.c | 2 +- gcc/testsuite/g++.dg/Wattributes-3.C | 90 ++ gcc/testsuite/g++.dg/Wattributes-4.C | 29 + gcc/testsuite/g++.dg/Wattributes-5.C | 34 + gcc/testsuite/g++.dg/abi/empty29.C | 7 + gcc/testsuite/g++.dg/cpp0x/desig2.C | 23 + gcc/testsuite/g++.dg/cpp0x/desig3.C | 21 + gcc/testsuite/g++.dg/cpp0x/desig4.C | 21 + gcc/testsuite/g++.dg/cpp1z/nontype-auto14.C | 14 + gcc/testsuite/g++.dg/pr82404.C | 17 + gcc/testsuite/gcc.c-torture/execute/pr83477.c | 22 + gcc/testsuite/gcc.dg/Wstringop-overflow.c | 132 +++ gcc/testsuite/gcc.dg/plugin/poly-int-tests.h | 14 + gcc/testsuite/gcc.dg/pr82404.c | 17 + gcc/testsuite/gcc.dg/pr82975.c | 3 +- gcc/testsuite/gcc.dg/strlenopt-38.c | 11 + gcc/testsuite/gcc.target/i386/avx-1.c | 5 + gcc/testsuite/gcc.target/i386/avx512-check.h | 3 + .../gcc.target/i386/avx512f-vpclmulqdq-2.c | 60 ++ ...avx512vl-aesdec-2.c => avx512vl-vpclmulqdq-2.c} | 8 +- gcc/testsuite/gcc.target/i386/i386.exp | 13 + gcc/testsuite/gcc.target/i386/sse-13.c | 5 + gcc/testsuite/gcc.target/i386/sse-23.c | 8 +- gcc/testsuite/gcc.target/i386/vpclmulqdq.c | 20 + gcc/tree-affine.c | 92 +- gcc/tree-affine.h | 18 +- gcc/tree-cfg.c | 19 +- gcc/tree-core.h | 6 + gcc/tree-data-ref.c | 6 +- gcc/tree-dfa.c | 175 ++-- gcc/tree-dfa.h | 10 +- gcc/tree-predcom.c | 14 +- gcc/tree-pretty-print.c | 12 + gcc/tree-sra.c | 26 +- gcc/tree-ssa-address.c | 7 +- gcc/tree-ssa-alias.c | 175 ++-- gcc/tree-ssa-alias.h | 16 +- gcc/tree-ssa-ccp.c | 11 +- gcc/tree-ssa-dce.c | 12 +- gcc/tree-ssa-dse.c | 84 +- gcc/tree-ssa-forwprop.c | 12 +- gcc/tree-ssa-loop-im.c | 2 +- gcc/tree-ssa-loop-ivopts.c | 41 +- gcc/tree-ssa-loop-niter.c | 2 +- gcc/tree-ssa-loop.c | 1 + gcc/tree-ssa-phiopt.c | 4 +- gcc/tree-ssa-pre.c | 2 +- gcc/tree-ssa-sccvn.c | 282 +++--- gcc/tree-ssa-sccvn.h | 2 +- gcc/tree-ssa-scopedtables.c | 22 +- gcc/tree-ssa-strlen.c | 35 +- gcc/tree-ssa-structalias.c | 39 +- gcc/tree-ssa-threadedge.c | 34 +- gcc/tree-ssa-uninit.c | 14 +- gcc/tree-streamer-in.c | 16 + gcc/tree-streamer-out.c | 15 + gcc/tree-streamer.c | 1 + gcc/tree-vect-data-refs.c | 2 +- gcc/tree-vrp.c | 23 +- gcc/tree.c | 263 ++++- gcc/tree.def | 3 + gcc/tree.h | 253 ++++- gcc/treestruct.def | 1 + gcc/valtrack.c | 2 +- gcc/var-tracking.c | 115 ++- gcc/wide-int.h | 18 +- libstdc++-v3/ChangeLog | 7 +- .../config/cpu/aarch64/opt/ext/opt_random.h | 2 +- 207 files changed, 6194 insertions(+), 2224 deletions(-) create mode 100644 gcc/config/i386/vpclmulqdqintrin.h create mode 100644 gcc/testsuite/g++.dg/Wattributes-3.C create mode 100644 gcc/testsuite/g++.dg/Wattributes-4.C create mode 100644 gcc/testsuite/g++.dg/Wattributes-5.C create mode 100644 gcc/testsuite/g++.dg/abi/empty29.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/desig2.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/desig3.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/desig4.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/nontype-auto14.C create mode 100644 gcc/testsuite/g++.dg/pr82404.C create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr83477.c create mode 100644 gcc/testsuite/gcc.dg/Wstringop-overflow.c create mode 100644 gcc/testsuite/gcc.dg/pr82404.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-vpclmulqdq-2.c copy gcc/testsuite/gcc.target/i386/{avx512vl-aesdec-2.c => avx512vl-vpclmulqdq-2.c} (61%) create mode 100644 gcc/testsuite/gcc.target/i386/vpclmulqdq.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[clang] branch master updated (56aba8eab8 -> 1c11a98e84)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 56aba8eab8 [hwasan] Implement -fsanitize-recover=hwaddress. new 1c11a98e84 Fix an assertion failure regression in isDesignatorAtObjectE [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/AST/ExprConstant.cpp | 5 ++++- test/Sema/builtin-object-size.c | 19 +++++++++++++++++++ 2 files changed, 23 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[llvm] branch master updated (595e94ec094 -> d8af78727dc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 595e94ec094 [Hexagon] Allow construction of HVX vector predicates new d8af78727dc [Hexagon] Use ArrayRef member functions instead of custom ones The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 29 +++++++++------------------ 1 file changed, 10 insertions(+), 19 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[llvm] branch master updated (16f8f30b381 -> 595e94ec094)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 16f8f30b381 [Hexagon] Legalize vector elements to i32 in buildVector32/64 new 595e94ec094 [Hexagon] Allow construction of HVX vector predicates The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/Hexagon/HexagonISelLowering.cpp | 332 +++++++++++++-------- lib/Target/Hexagon/HexagonISelLowering.h | 12 + lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 134 +++++++-- lib/Target/Hexagon/HexagonPatterns.td | 9 + lib/Target/Hexagon/HexagonRegisterInfo.td | 5 +- lib/Target/Hexagon/HexagonSubtarget.h | 32 +- .../Hexagon/autohvx/build-vector-i32-type.ll | 19 ++ test/CodeGen/Hexagon/autohvx/isel-bool-vector.ll | 18 ++ test/CodeGen/Hexagon/expand-vstorerw-undef.ll | 2 +- test/CodeGen/Hexagon/v60-cur.ll | 5 +- test/CodeGen/Hexagon/vect/vect-infloop.ll | 10 +- 11 files changed, 408 insertions(+), 170 deletions(-) create mode 100644 test/CodeGen/Hexagon/autohvx/build-vector-i32-type.ll create mode 100644 test/CodeGen/Hexagon/autohvx/isel-bool-vector.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[lld] branch master updated (89f3b12b7 -> 8b0a6713d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from 89f3b12b7 clang-format. NFC. new 8b0a6713d Use dyn_cast instead of dyn_cast_or_null. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ELF/MarkLive.cpp | 2 +- ELF/Target.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[gcc] branch master updated (369c9a01509 -> 045f03f1454)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 369c9a01509 PR ipa/83506 * ipa-fnsummary.c (pass_data_ipa_free_fn_sum [...] new 045f03f1454 2017-12-20 Thomas Koenig <tkoenig(a)gcc.gnu.org> The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/ChangeLog | 5 ++++ gcc/testsuite/gfortran.dg/internal_readwrite_4.f90 | 30 ++++++++++++++++++++++ 2 files changed, 35 insertions(+) create mode 100644 gcc/testsuite/gfortran.dg/internal_readwrite_4.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[llvm] branch master updated (cec1521c07c -> 16f8f30b381)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from cec1521c07c Do not generate an empty switch statement as it causes MSVC [...] new 16f8f30b381 [Hexagon] Legalize vector elements to i32 in buildVector32/64 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/Hexagon/HexagonISelLowering.cpp | 37 ++++++++++++++++++------------ 1 file changed, 22 insertions(+), 15 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[llvm] branch master updated (fe6f85f7dda -> cec1521c07c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from fe6f85f7dda bpf: add support for objdump -print-imm-hex new cec1521c07c Do not generate an empty switch statement as it causes MSVC [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: utils/TableGen/GlobalISelEmitter.cpp | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits December 2017