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from 82e0652b954 [AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debu [...]
new f534f4a24f7 [AMDGPU] Fix typo in Kernel Descriptor for GFX6-GFX9
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docs/AMDGPUUsage.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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from 71627f79010 [AMDGPU] Add options for waitcnt pass debugging; add instr [...]
new 82e0652b954 [AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debu [...]
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lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 70 ++++------------------------------
test/CodeGen/AMDGPU/waitcnt-debug.mir | 41 --------------------
2 files changed, 8 insertions(+), 103 deletions(-)
delete mode 100644 test/CodeGen/AMDGPU/waitcnt-debug.mir
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from 0d51b663974 [X86] Fix InsertBitToMaskVector to only issue KSHIFTS of na [...]
new 5e07001873f [AMDGPU] Add GCNHazardRecognizer::checkInlineAsmHazards() a [...]
new 71627f79010 [AMDGPU] Add options for waitcnt pass debugging; add instr [...]
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Summary of changes:
lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 77 ++++++++++++++++++++++++-------
lib/Target/AMDGPU/GCNHazardRecognizer.h | 4 ++
lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 70 ++++++++++++++++++++++++----
test/CodeGen/AMDGPU/hazard-inlineasm.mir | 24 ++++++++++
test/CodeGen/AMDGPU/waitcnt-debug.mir | 41 ++++++++++++++++
5 files changed, 191 insertions(+), 25 deletions(-)
create mode 100644 test/CodeGen/AMDGPU/hazard-inlineasm.mir
create mode 100644 test/CodeGen/AMDGPU/waitcnt-debug.mir
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unknown user pushed a change to branch master
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from e9a55b7c48 [OpenMP] NVPTX: Set default/minimum compute capability to sm_35
new 8c8d967b8a [libclang] Record code-completion invocations to a temporary [...]
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test/Index/record-completion-invocation.c | 11 +++++++++++
tools/c-index-test/c-index-test.c | 8 ++++++--
tools/libclang/CIndex.cpp | 14 ++++++++++++--
tools/libclang/CIndexCodeCompletion.cpp | 11 +++++++++++
tools/libclang/CIndexer.cpp | 9 +++++++++
tools/libclang/CIndexer.h | 1 +
tools/libclang/CXTranslationUnit.h | 2 ++
7 files changed, 52 insertions(+), 4 deletions(-)
create mode 100644 test/Index/record-completion-invocation.c
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from a2b5d62923 [OPENMP] Do not capture private variables in the target regions.
new e9a55b7c48 [OpenMP] NVPTX: Set default/minimum compute capability to sm_35
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CMakeLists.txt | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
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from 1f609ed2b6b [InstCombine] add tests for abs using bit hackery; NFC
new 69ac4825384 [X86] Make a couple helper lowering methods static.
new db4e07a1a3d [X86] Fix typo in variable name. NFC
new 0d51b663974 [X86] Fix InsertBitToMaskVector to only issue KSHIFTS of na [...]
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lib/Target/X86/X86ISelLowering.cpp | 55 ++++--
lib/Target/X86/X86ISelLowering.h | 2 -
test/CodeGen/X86/avx512-insert-extract.ll | 22 ++-
test/CodeGen/X86/avx512-mask-op.ll | 54 +++---
test/CodeGen/X86/avx512vl-vec-masked-cmp.ll | 270 ++++++++++------------------
5 files changed, 174 insertions(+), 229 deletions(-)
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from a52dedf5303 Allow _Alignas in compound literals (C11 DR#444).
new 59d01fbaf41 PR libstdc++/83120 * testsuite/ext/special_ [...]
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libstdc++-v3/ChangeLog | 7 +++++++
libstdc++-v3/testsuite/ext/special_functions/hyperg/check_value.cc | 3 ++-
.../special_functions/17_hyperg/check_value.cc | 3 ++-
3 files changed, 11 insertions(+), 2 deletions(-)
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from e7a9841d9 Disable warnings related to anonymous types in the ObjC plugin
new ffe1073ba These tests don't depend on debug info format.
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packages/Python/lldbsuite/test/functionalities/exec/TestExec.py | 2 ++
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from a962eebcb6 update hwasan docs
new a2b5d62923 [OPENMP] Do not capture private variables in the target regions.
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lib/Sema/SemaExpr.cpp | 6 ++++--
test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp | 10 +++++-----
.../teams_distribute_parallel_for_simd_private_codegen.cpp | 10 +++++-----
test/OpenMP/teams_distribute_private_codegen.cpp | 11 +++++------
test/OpenMP/teams_distribute_simd_private_codegen.cpp | 10 +++++-----
test/OpenMP/teams_private_codegen.cpp | 9 ++++-----
6 files changed, 28 insertions(+), 28 deletions(-)
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unknown user pushed a change to branch hjl/cet/master
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discards ac195a2d55 Linux/x86: Support shadow stack pointer in setjmp/longjmp
discards 38898057fa x86: Support IBT and SHSTK in Intel CET [BZ #21598]
discards 0dec4e9591 x86: Add feature_1 to tcbhead_t [BZ #22563]
discards 243600b07e Linux/x86: Update cancel_jmp_buf to match __jmp_buf_tag [BZ #22563]
adds d89756ebe1 lt_LT locale: Base collation on copy "iso14651_t1" [BZ #22524]
adds d15e83c5f5 Fix ctanh (0 + i NaN), ctanh (0 + i Inf) (bug 22568, DR#471).
adds 9574c7b68d x86-64: Remove sysdeps/x86_64/fpu/s_sinf.S
adds 9d0ffa60ad x86-64: Add sinf with FMA
adds 986d3051c3 Linux/x86: Update cancel_jmp_buf to match __jmp_buf_tag [BZ #22563]
adds 68b40b4059 x86: Add feature_1 to tcbhead_t [BZ #22563]
new 89851dd6c5 x86: Support IBT and SHSTK in Intel CET [BZ #21598]
new 6c9578d51a Linux/x86: Support shadow stack pointer in setjmp/longjmp
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Summary of changes:
ChangeLog | 32 +
NEWS | 4 +-
.../types/__cancel_jmp_buf_tag.h | 16 +-
localedata/Makefile | 4 +-
localedata/locales/lt_LT | 2150 +-------------------
localedata/lt_LT.UTF-8.in | 37 +
math/libm-test-ctan.inc | 12 +-
math/libm-test-ctanh.inc | 12 +-
math/s_ctan_template.c | 5 +-
math/s_ctanh_template.c | 5 +-
nptl/Makefile | 3 +-
sysdeps/nptl/pthread.h | 7 +-
.../linux/x86/bits/types/__cancel_jmp_buf_tag.h | 17 +-
sysdeps/unix/sysv/linux/x86/pthread.h | 1165 -----------
sysdeps/x86_64/fpu/multiarch/Makefile | 5 +-
sysdeps/x86_64/fpu/multiarch/s_sinf-fma.c | 2 +
sysdeps/x86_64/fpu/multiarch/s_sinf-sse2.c | 2 +
.../fpu/multiarch/s_sinf.c} | 13 +-
sysdeps/x86_64/fpu/s_sinf.S | 559 -----
19 files changed, 223 insertions(+), 3827 deletions(-)
copy sysdeps/x86_64/multiarch/memrchr-sse2.S => bits/types/__cancel_jmp_buf_tag.h (78%)
create mode 100644 localedata/lt_LT.UTF-8.in
copy bits/uio_lim.h => sysdeps/unix/sysv/linux/x86/bits/types/__cancel_jmp_buf_tag [...]
delete mode 100644 sysdeps/unix/sysv/linux/x86/pthread.h
create mode 100644 sysdeps/x86_64/fpu/multiarch/s_sinf-fma.c
create mode 100644 sysdeps/x86_64/fpu/multiarch/s_sinf-sse2.c
copy sysdeps/{ieee754/float128/wcstof128_l.c => x86_64/fpu/multiarch/s_sinf.c} (76%)
delete mode 100644 sysdeps/x86_64/fpu/s_sinf.S
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