Tcwg-commits December 2017

tcwg-commits@lists.linaro.org

7 participants
2701 discussions

[llvm] branch master updated (8d76ea7a0bc -> 95ffa0fcb92)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 8d76ea7a0bc Revert "[InstCombine] Fix PR35618: Instcombine hangs on sin [...] new 95ffa0fcb92 [RISCV] Implement assembler pseudo instructions for RV32I a [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp | 11 +- lib/Target/RISCV/RISCV.td | 2 + lib/Target/RISCV/RISCVInstrInfo.td | 84 +++++++++++++ test/MC/RISCV/rv32i-aliases-invalid.s | 8 ++ test/MC/RISCV/rv32i-aliases-valid.s | 20 ++++ test/MC/RISCV/rv64i-aliases-invalid.s | 6 + test/MC/RISCV/rv64i-aliases-valid.s | 20 ++++ test/MC/RISCV/rvi-aliases-valid.s | 138 ++++++++++++++++++++++ 8 files changed, 288 insertions(+), 1 deletion(-) create mode 100644 test/MC/RISCV/rv32i-aliases-invalid.s create mode 100644 test/MC/RISCV/rv32i-aliases-valid.s create mode 100644 test/MC/RISCV/rv64i-aliases-invalid.s create mode 100644 test/MC/RISCV/rv64i-aliases-valid.s create mode 100644 test/MC/RISCV/rvi-aliases-valid.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[llvm] branch master updated (15d22cecdfe -> 8d76ea7a0bc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 15d22cecdfe [RISCV] MC layer support for the instructions added in the [...] new 8d76ea7a0bc Revert "[InstCombine] Fix PR35618: Instcombine hangs on sin [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../InstCombine/InstCombineLoadStoreAlloca.cpp | 19 ++------------ .../multiple-uses-load-bitcast-select.ll | 30 ---------------------- 2 files changed, 2 insertions(+), 47 deletions(-) delete mode 100644 test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[llvm] branch master updated (50ead9021f9 -> 15d22cecdfe)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 50ead9021f9 [InstCombine] Fix PR35618: Instcombine hangs on single minm [...] new 15d22cecdfe [RISCV] MC layer support for the instructions added in the [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/RISCV/RISCVInstrInfo.td | 42 ++++++++++++++++++++++++++++++++++++++ test/MC/RISCV/priv-invalid.s | 7 +++++++ test/MC/RISCV/priv-valid.s | 32 +++++++++++++++++++++++++++++ 3 files changed, 81 insertions(+) create mode 100644 test/MC/RISCV/priv-invalid.s create mode 100644 test/MC/RISCV/priv-valid.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[llvm] branch master updated (2139df9b5de -> 50ead9021f9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 2139df9b5de [X86] Recognize constant arrays with special values and rep [...] new 50ead9021f9 [InstCombine] Fix PR35618: Instcombine hangs on single minm [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../InstCombine/InstCombineLoadStoreAlloca.cpp | 19 ++++++++++++-- .../multiple-uses-load-bitcast-select.ll | 30 ++++++++++++++++++++++ 2 files changed, 47 insertions(+), 2 deletions(-) create mode 100644 test/Transforms/InstCombine/multiple-uses-load-bitcast-select.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[binutils-gdb] branch master updated (db9077b727 -> 702d582e2c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from db9077b727 PR22576, ppc64_skip_trampoline_code uses wrong r2 for EXEC_REVERSE new a994fec4f8 gdb: Add OpenRISC or1k and or1knd target support new c3d186206b gdb: testsuite: Add or1k l.nop instruction new fe49c6f559 gdb: testsuite: Add or1k tdesc-regs.exp test support new 638d913757 Add gdb for or1k build new 07b95864f3 sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd]) new 58884b0e45 sim: cgen: add MUL2OFSI and MUL1OFSI functions (needed for O [...] new fa8b7c2128 sim: or1k: add or1k target to sim new 6e51bfa755 sim: or1k: add cgen generated files new 0cd7970733 sim: or1k: add autoconf generated files new 702d582e2c sim: testsuite: add testsuite for or1k sim The 10 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 5 + configure | 7 - configure.ac | 7 - gdb/ChangeLog | 14 + gdb/configure.tgt | 6 + gdb/doc/ChangeLog | 7 + gdb/doc/gdb.texinfo | 47 + gdb/features/Makefile | 2 + gdb/features/or1k-core.xml | 65 + gdb/features/or1k.c | 77 + gdb/features/or1k.xml | 12 + gdb/or1k-tdep.c | 1294 ++ gdb/or1k-tdep.h | 56 + gdb/testsuite/ChangeLog | 8 + gdb/testsuite/gdb.base/bp-permanent.c | 2 + gdb/testsuite/gdb.xml/tdesc-regs.exp | 3 + sim/ChangeLog | 36 + sim/common/ChangeLog | 18 + sim/common/cgen-accfp.c | 40 + sim/common/cgen-fpu.h | 4 + sim/common/cgen-ops.h | 18 + sim/common/sim-fpu.c | 86 + sim/common/sim-fpu.h | 13 +- sim/configure | 9 + sim/configure.tgt | 3 + sim/or1k/Makefile.in | 147 + sim/or1k/README | 107 + sim/or1k/aclocal.m4 | 119 + sim/or1k/arch.c | 38 + sim/or1k/arch.h | 50 + sim/or1k/config.in | 248 + sim/or1k/configure | 16043 +++++++++++++++++++++++ sim/or1k/configure.ac | 17 + sim/or1k/cpu.c | 10181 ++++++++++++++ sim/or1k/cpu.h | 5024 +++++++ sim/or1k/cpuall.h | 66 + sim/or1k/decode.c | 2559 ++++ sim/or1k/decode.h | 94 + sim/or1k/mloop.in | 241 + sim/or1k/model.c | 3809 ++++++ sim/or1k/or1k-sim.h | 93 + sim/or1k/or1k.c | 356 + sim/or1k/sem-switch.c | 2748 ++++ sim/or1k/sem.c | 2953 +++++ sim/or1k/sim-if.c | 279 + sim/or1k/sim-main.h | 81 + sim/or1k/traps.c | 299 + sim/testsuite/ChangeLog | 5 + sim/testsuite/configure | 4 + sim/testsuite/sim/or1k/ChangeLog | 28 + sim/testsuite/sim/or1k/add.S | 639 + sim/testsuite/sim/or1k/alltests.exp | 34 + sim/testsuite/sim/or1k/and.S | 198 + sim/testsuite/sim/or1k/basic.S | 522 + sim/testsuite/sim/or1k/div.S | 291 + sim/testsuite/sim/or1k/ext.S | 236 + sim/testsuite/sim/or1k/find.S | 100 + sim/testsuite/sim/or1k/flag.S | 386 + sim/testsuite/sim/or1k/fpu.S | 129 + sim/testsuite/sim/or1k/jump.S | 105 + sim/testsuite/sim/or1k/load.S | 358 + sim/testsuite/sim/or1k/mac.S | 778 ++ sim/testsuite/sim/or1k/mfspr.S | 171 + sim/testsuite/sim/or1k/mul.S | 574 + sim/testsuite/sim/or1k/or.S | 199 + sim/testsuite/sim/or1k/or1k-asm-test-env.h | 59 + sim/testsuite/sim/or1k/or1k-asm-test-helpers.h | 121 + sim/testsuite/sim/or1k/or1k-asm-test.h | 226 + sim/testsuite/sim/or1k/or1k-asm.h | 37 + sim/testsuite/sim/or1k/or1k-test.ld | 75 + sim/testsuite/sim/or1k/ror.S | 159 + sim/testsuite/sim/or1k/shift.S | 541 + sim/testsuite/sim/or1k/spr-defs.h | 120 + sim/testsuite/sim/or1k/sub.S | 215 + sim/testsuite/sim/or1k/xor.S | 200 + 75 files changed, 53882 insertions(+), 19 deletions(-) create mode 100644 gdb/features/or1k-core.xml create mode 100644 gdb/features/or1k.c create mode 100644 gdb/features/or1k.xml create mode 100644 gdb/or1k-tdep.c create mode 100644 gdb/or1k-tdep.h create mode 100644 sim/or1k/Makefile.in create mode 100644 sim/or1k/README create mode 100644 sim/or1k/aclocal.m4 create mode 100644 sim/or1k/arch.c create mode 100644 sim/or1k/arch.h create mode 100644 sim/or1k/config.in create mode 100755 sim/or1k/configure create mode 100644 sim/or1k/configure.ac create mode 100644 sim/or1k/cpu.c create mode 100644 sim/or1k/cpu.h create mode 100644 sim/or1k/cpuall.h create mode 100644 sim/or1k/decode.c create mode 100644 sim/or1k/decode.h create mode 100644 sim/or1k/mloop.in create mode 100644 sim/or1k/model.c create mode 100644 sim/or1k/or1k-sim.h create mode 100644 sim/or1k/or1k.c create mode 100644 sim/or1k/sem-switch.c create mode 100644 sim/or1k/sem.c create mode 100644 sim/or1k/sim-if.c create mode 100644 sim/or1k/sim-main.h create mode 100644 sim/or1k/traps.c create mode 100644 sim/testsuite/sim/or1k/ChangeLog create mode 100644 sim/testsuite/sim/or1k/add.S create mode 100644 sim/testsuite/sim/or1k/alltests.exp create mode 100644 sim/testsuite/sim/or1k/and.S create mode 100644 sim/testsuite/sim/or1k/basic.S create mode 100644 sim/testsuite/sim/or1k/div.S create mode 100644 sim/testsuite/sim/or1k/ext.S create mode 100644 sim/testsuite/sim/or1k/find.S create mode 100644 sim/testsuite/sim/or1k/flag.S create mode 100644 sim/testsuite/sim/or1k/fpu.S create mode 100644 sim/testsuite/sim/or1k/jump.S create mode 100644 sim/testsuite/sim/or1k/load.S create mode 100644 sim/testsuite/sim/or1k/mac.S create mode 100644 sim/testsuite/sim/or1k/mfspr.S create mode 100644 sim/testsuite/sim/or1k/mul.S create mode 100644 sim/testsuite/sim/or1k/or.S create mode 100644 sim/testsuite/sim/or1k/or1k-asm-test-env.h create mode 100644 sim/testsuite/sim/or1k/or1k-asm-test-helpers.h create mode 100644 sim/testsuite/sim/or1k/or1k-asm-test.h create mode 100644 sim/testsuite/sim/or1k/or1k-asm.h create mode 100644 sim/testsuite/sim/or1k/or1k-test.ld create mode 100644 sim/testsuite/sim/or1k/ror.S create mode 100644 sim/testsuite/sim/or1k/shift.S create mode 100644 sim/testsuite/sim/or1k/spr-defs.h create mode 100644 sim/testsuite/sim/or1k/sub.S create mode 100644 sim/testsuite/sim/or1k/xor.S -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[gcc] branch master updated (9de168c69ca -> 1963e4b365b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 9de168c69ca Fix g++.old-deja/g++.pt/const2.C on Solaris new 1963e4b365b 2017-12-12 Stafford Horne <shorne(a)gmail.com> The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 5 +++++ configure | 7 ------- configure.ac | 7 ------- 3 files changed, 5 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[glibc] branch master updated (4e0dca54e9 -> 89bd8016b3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from 4e0dca54e9 [BZ #22593] Fix nextafter and nexttoward declaration new 89bd8016b3 ia64: Add ipc_priv.h header to set __IPC_64 to zero The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 5 +++++ sysdeps/unix/sysv/linux/{hppa => ia64}/ipc_priv.h | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) copy sysdeps/unix/sysv/linux/{hppa => ia64}/ipc_priv.h (93%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[llvm] branch master updated (cdba0c77254 -> 2139df9b5de)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from cdba0c77254 [PowerPC] Add branch flag on asm parser-only branch instructions new 513fd90b3f7 [InstComineLoadStoreAlloca] Optimize stores to GEP off null base new 2139df9b5de [X86] Recognize constant arrays with special values and rep [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/X86/X86ISelLowering.cpp | 121 +++++++++++++++++++++ .../InstCombine/InstCombineLoadStoreAlloca.cpp | 13 ++- test/CodeGen/X86/replace-load-and-with-bzhi.ll | 36 +++--- test/Transforms/InstCombine/store.ll | 8 ++ 4 files changed, 155 insertions(+), 23 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[clang-tools-extra] branch master updated (27f92230 -> 25993422)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang-tools-extra. from 27f92230 [clangd] clang-format the code. NFC new 25993422 [clangd] Removed unused variable. NFC The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clangd/ClangdUnit.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

[glibc] branch master updated (0cee1257a9 -> 4e0dca54e9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from 0cee1257a9 manual: Fix a typo in locale.texi. new 8df5d34720 Remove --with-fp / --without-fp. new 4e0dca54e9 [BZ #22593] Fix nextafter and nexttoward declaration The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 24 +++++++++++++++++++++ INSTALL | 4 ---- NEWS | 5 +++++ config.make.in | 2 +- configure | 44 +++++++++++++++++++++++++++----------- configure.ac | 31 +++++++++++++++++++++------ manual/install.texi | 4 ---- math/bits/mathcalls.h | 4 ++-- scripts/build-many-glibcs.py | 51 +++++++++++++++----------------------------- sysdeps/m68k/preconfigure | 6 +++++- sysdeps/mips/preconfigure | 2 ++ sysdeps/powerpc/preconfigure | 1 + sysdeps/sh/preconfigure | 10 +++++++-- 13 files changed, 120 insertions(+), 68 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 11 months

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Tcwg-commits December 2017