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from 1ad636909 Simplify NativeProcessProtocol::GetArchitecture/GetByteOrder
new 019692b3d Add a unit test for ClangASTContext template arguments handling
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unittests/Symbol/TestClangASTContext.cpp | 45 ++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
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unknown user pushed a change to branch master
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from 44ce7b27194 Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...]
new 73776e8826a Improve ivopts handling of forced scales
new 67c52133827 Be stricter about CONST_VECTOR operands
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gcc/ChangeLog | 17 +++++++++++++++++
gcc/doc/rtl.texi | 3 ++-
gcc/emit-rtl.c | 13 ++++++++++++-
gcc/emit-rtl.h | 1 +
gcc/optabs.c | 2 +-
gcc/tree-ssa-loop-ivopts.c | 17 +++++++++++++----
6 files changed, 46 insertions(+), 7 deletions(-)
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unknown user pushed a change to branch master
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from f8c0f51efe4 [RISCV] MC layer support for the standard RV32M instruction [...]
new 9a5be1f5667 Reapply: Allow yaml2obj to order implicit sections for ELF
new 2ef1ea64082 Fix 'not all control paths return a value' warning on MSVC builds
new d99baa702cc [RISCV] MC layer support for the standard RV32A instruction [...]
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Summary of changes:
lib/ExecutionEngine/SectionMemoryManager.cpp | 1 +
lib/ObjectYAML/ELFYAML.cpp | 2 +-
lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 37 +++++--
lib/Target/RISCV/RISCV.td | 17 ++-
lib/Target/RISCV/RISCVInstrFormats.td | 18 ++++
lib/Target/RISCV/RISCVInstrInfo.td | 1 +
lib/Target/RISCV/RISCVInstrInfoA.td | 63 +++++++++++
lib/Target/RISCV/RISCVSubtarget.h | 4 +-
test/MC/RISCV/rv32a-invalid.s | 14 +++
test/MC/RISCV/rv32a-valid.s | 146 ++++++++++++++++++++++++++
test/MC/RISCV/rv32i-invalid.s | 2 +
test/tools/yaml2obj/section-ordering.yaml | 29 +++++
test/tools/yaml2obj/unnamed-section.yaml | 22 ++++
tools/yaml2obj/yaml2elf.cpp | 81 +++++++-------
14 files changed, 385 insertions(+), 52 deletions(-)
create mode 100644 lib/Target/RISCV/RISCVInstrInfoA.td
create mode 100644 test/MC/RISCV/rv32a-invalid.s
create mode 100644 test/MC/RISCV/rv32a-valid.s
create mode 100644 test/tools/yaml2obj/section-ordering.yaml
create mode 100644 test/tools/yaml2obj/unnamed-section.yaml
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from a4b0c616f63 Sched model improving on btver2: JFPU01 resource, vtestp* f [...]
new f8c0f51efe4 [RISCV] MC layer support for the standard RV32M instruction [...]
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lib/Target/RISCV/RISCV.td | 13 +++++++++----
lib/Target/RISCV/RISCVInstrInfo.td | 6 ++++++
lib/Target/RISCV/RISCVInstrInfoM.td | 28 ++++++++++++++++++++++++++++
lib/Target/RISCV/RISCVSubtarget.h | 2 ++
test/MC/RISCV/rv32i-invalid.s | 3 +++
test/MC/RISCV/rv32m-valid.s | 33 +++++++++++++++++++++++++++++++++
6 files changed, 81 insertions(+), 4 deletions(-)
create mode 100644 lib/Target/RISCV/RISCVInstrInfoM.td
create mode 100644 test/MC/RISCV/rv32m-valid.s
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unknown user pushed a change to branch gcc-6-branch
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from e82b69f3ec7 Backport from mainline 2017-11-01 Segher Boessenkool <s [...]
new 47d739d95a9 [ARM][PATCH v2] enable FL_LPAE flag for armv7ve cores
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gcc/ChangeLog | 5 +++++
gcc/config/arm/arm-cores.def | 12 ++++++------
2 files changed, 11 insertions(+), 6 deletions(-)
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from 371858d4588 PR ipa/82879 * ipa-inline-transform.c (update_noncloned_f [...]
new 44ce7b27194 Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...]
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gcc/ChangeLog | 16 ++++++++++++++++
gcc/doc/rtl.texi | 42 ++++++++++++++++++++++++++++--------------
gcc/emit-rtl.c | 51 +++++++++++++++++++++++++++++++++------------------
gcc/expmed.c | 5 +++--
gcc/expr.c | 3 ++-
5 files changed, 82 insertions(+), 35 deletions(-)
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unknown user pushed a change to branch master
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from dc14379 Cleanup version symbol macros and attributes/declspecs
new 8cf319e [OMPT] Add support for testing return addresses on POWER
new f0158da [OMPT] Fix test cancel_parallel.c
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runtime/test/ompt/callback.h | 88 ++++++++++++++++++++++++------
runtime/test/ompt/cancel/cancel_parallel.c | 30 +++++-----
2 files changed, 86 insertions(+), 32 deletions(-)
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from a5b99ed5222 Add -print-schedule scheduling comments to inline asm. Diff [...]
new a4b0c616f63 Sched model improving on btver2: JFPU01 resource, vtestp* f [...]
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lib/Target/X86/X86ScheduleBtVer2.td | 37 ++++++++++++++++++++++++++-----------
test/CodeGen/X86/avx-schedule.ll | 16 ++++++++--------
test/CodeGen/X86/sse41-schedule.ll | 16 ++++++++--------
3 files changed, 42 insertions(+), 27 deletions(-)
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from 12b25483ace 2017-11-09 Jerome Lambourg <lambourg(a)adacore.com>
new 371858d4588 PR ipa/82879 * ipa-inline-transform.c (update_noncloned_f [...]
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gcc/ChangeLog | 10 ++++++++++
gcc/ipa-inline-transform.c | 12 +-----------
gcc/profile-count.c | 26 ++++++++++++++++++++++++++
gcc/profile-count.h | 5 +++++
gcc/testsuite/ChangeLog | 4 ++++
gcc/testsuite/gcc.c-torture/compile/pr82879.c | 11 +++++++++++
gcc/tree-inline.c | 24 ++----------------------
7 files changed, 59 insertions(+), 33 deletions(-)
create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr82879.c
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from f7c9b330bad 2017-11-09 Ed Schonberg <schonberg(a)adacore.com>
new 12b25483ace 2017-11-09 Jerome Lambourg <lambourg(a)adacore.com>
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gcc/ada/ChangeLog | 9 +++++++++
gcc/ada/gcc-interface/Makefile.in | 31 +++++++++++++++++++++++++++++++
gcc/ada/gcc-interface/trans.c | 8 ++++----
3 files changed, 44 insertions(+), 4 deletions(-)
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