Tcwg-commits January 2017

tcwg-commits@lists.linaro.org

7 participants
3420 discussions

[glibc] branch master updated (5845ce0 -> af1a265)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from 5845ce0 Add missing bugzilla reference in previous ChangeLog entry new af1a265 * soft-fp/op-common.h (_FP_MUL, _FP_FMA, _FP_DIV): Add /* F [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 5 +++++ soft-fp/op-common.h | 5 +++++ 2 files changed, 10 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 10 months

[llvm] branch master updated (706238d -> d019e86)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 706238d Explicitly promote indirect calls before sample profile annotation. new d019e86 Enable FeatureFlatForGlobal on Volcanic Islands The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/AMDGPU.td | 17 +++++++++++++++-- lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 1 + lib/Target/AMDGPU/AMDGPUSubtarget.h | 1 + test/CodeGen/AMDGPU/32-bit-local-address-space.ll | 2 +- test/CodeGen/AMDGPU/add.i16.ll | 2 +- test/CodeGen/AMDGPU/add.ll | 2 +- test/CodeGen/AMDGPU/amdgcn.private-memory.ll | 4 ++-- .../AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll | 4 ++-- test/CodeGen/AMDGPU/and.ll | 2 +- test/CodeGen/AMDGPU/anyext.ll | 2 +- test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll | 4 ++-- test/CodeGen/AMDGPU/atomic_load_add.ll | 4 ++-- test/CodeGen/AMDGPU/atomic_load_sub.ll | 2 +- test/CodeGen/AMDGPU/basic-branch.ll | 4 ++-- test/CodeGen/AMDGPU/bfi_int.ll | 4 ++-- test/CodeGen/AMDGPU/bfm.ll | 4 ++-- test/CodeGen/AMDGPU/bitcast-vector-extract.ll | 2 +- test/CodeGen/AMDGPU/bitreverse.ll | 4 ++-- test/CodeGen/AMDGPU/br_cc.f16.ll | 2 +- test/CodeGen/AMDGPU/branch-condition-and.ll | 2 +- test/CodeGen/AMDGPU/bswap.ll | 2 +- test/CodeGen/AMDGPU/bug-vopc-commute.ll | 6 ++---- test/CodeGen/AMDGPU/build_vector.ll | 4 ++-- test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll | 4 ++-- test/CodeGen/AMDGPU/cgp-addressing-modes.ll | 4 ++-- test/CodeGen/AMDGPU/cgp-bitfield-extract.ll | 4 ++-- test/CodeGen/AMDGPU/concat_vectors.ll | 4 ++-- test/CodeGen/AMDGPU/constant-fold-mi-operands.ll | 2 +- test/CodeGen/AMDGPU/copy-illegal-type.ll | 2 +- test/CodeGen/AMDGPU/copy-to-reg.ll | 4 ++-- test/CodeGen/AMDGPU/ctlz.ll | 2 +- test/CodeGen/AMDGPU/ctlz_zero_undef.ll | 4 ++-- test/CodeGen/AMDGPU/ctpop.ll | 4 ++-- test/CodeGen/AMDGPU/ctpop64.ll | 2 +- test/CodeGen/AMDGPU/cttz_zero_undef.ll | 4 ++-- test/CodeGen/AMDGPU/cube.ll | 4 ++-- test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 2 +- test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll | 4 ++-- test/CodeGen/AMDGPU/elf.ll | 14 +++++++------- test/CodeGen/AMDGPU/extload.ll | 2 +- test/CodeGen/AMDGPU/extract_vector_elt-f16.ll | 2 +- test/CodeGen/AMDGPU/extract_vector_elt-f64.ll | 2 +- test/CodeGen/AMDGPU/extract_vector_elt-i16.ll | 2 +- test/CodeGen/AMDGPU/extract_vector_elt-i64.ll | 2 +- test/CodeGen/AMDGPU/extract_vector_elt-i8.ll | 2 +- test/CodeGen/AMDGPU/fabs.ll | 2 +- test/CodeGen/AMDGPU/fadd.f16.ll | 2 +- test/CodeGen/AMDGPU/fadd.ll | 2 +- test/CodeGen/AMDGPU/fadd64.ll | 4 ++-- test/CodeGen/AMDGPU/fcanonicalize.f16.ll | 2 +- test/CodeGen/AMDGPU/fceil.ll | 4 ++-- test/CodeGen/AMDGPU/fcmp.f16.ll | 2 +- test/CodeGen/AMDGPU/fcmp64.ll | 2 +- test/CodeGen/AMDGPU/fcopysign.f16.ll | 2 +- test/CodeGen/AMDGPU/fcopysign.f32.ll | 2 +- test/CodeGen/AMDGPU/fcopysign.f64.ll | 2 +- test/CodeGen/AMDGPU/fdiv.f16.ll | 4 ++-- test/CodeGen/AMDGPU/fdiv.f64.ll | 2 +- test/CodeGen/AMDGPU/fdiv.ll | 6 +++--- test/CodeGen/AMDGPU/ffloor.f64.ll | 2 +- test/CodeGen/AMDGPU/ffloor.ll | 4 ++-- test/CodeGen/AMDGPU/flat-address-space.ll | 4 ++-- test/CodeGen/AMDGPU/flat-scratch-reg.ll | 2 +- test/CodeGen/AMDGPU/fma.f64.ll | 4 ++-- test/CodeGen/AMDGPU/fmax3.f64.ll | 4 ++-- test/CodeGen/AMDGPU/fmax3.ll | 4 ++-- test/CodeGen/AMDGPU/fmaxnum.f64.ll | 4 ++-- test/CodeGen/AMDGPU/fmaxnum.ll | 2 +- test/CodeGen/AMDGPU/fmin3.ll | 6 +++--- test/CodeGen/AMDGPU/fminnum.ll | 2 +- test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll | 4 ++-- test/CodeGen/AMDGPU/fmul.f16.ll | 2 +- test/CodeGen/AMDGPU/fmul.ll | 2 +- test/CodeGen/AMDGPU/fmuladd.f64.ll | 4 ++-- test/CodeGen/AMDGPU/fnearbyint.ll | 4 ++-- test/CodeGen/AMDGPU/fneg-fabs.f64.ll | 2 +- test/CodeGen/AMDGPU/fneg.f64.ll | 4 ++-- test/CodeGen/AMDGPU/fneg.ll | 2 +- test/CodeGen/AMDGPU/fp16_to_fp32.ll | 2 +- test/CodeGen/AMDGPU/fp16_to_fp64.ll | 2 +- test/CodeGen/AMDGPU/fp32_to_fp16.ll | 2 +- test/CodeGen/AMDGPU/fp_to_sint.ll | 2 +- test/CodeGen/AMDGPU/fp_to_uint.ll | 2 +- test/CodeGen/AMDGPU/fpext.f16.ll | 2 +- test/CodeGen/AMDGPU/fpext.ll | 2 +- test/CodeGen/AMDGPU/fptosi.f16.ll | 2 +- test/CodeGen/AMDGPU/fptoui.f16.ll | 2 +- test/CodeGen/AMDGPU/fptrunc.f16.ll | 2 +- test/CodeGen/AMDGPU/fptrunc.ll | 6 +++--- test/CodeGen/AMDGPU/fract.f64.ll | 4 ++-- test/CodeGen/AMDGPU/fract.ll | 4 ++-- test/CodeGen/AMDGPU/frem.ll | 4 ++-- test/CodeGen/AMDGPU/fsqrt.f64.ll | 2 +- test/CodeGen/AMDGPU/fsqrt.ll | 2 +- test/CodeGen/AMDGPU/fsub.f16.ll | 2 +- test/CodeGen/AMDGPU/ftrunc.ll | 2 +- test/CodeGen/AMDGPU/gep-address-space.ll | 2 +- test/CodeGen/AMDGPU/global-directive.ll | 2 +- test/CodeGen/AMDGPU/global-extload-i16.ll | 4 ++-- test/CodeGen/AMDGPU/global_atomics.ll | 2 +- test/CodeGen/AMDGPU/global_atomics_i64.ll | 2 +- test/CodeGen/AMDGPU/gv-const-addrspace.ll | 4 ++-- test/CodeGen/AMDGPU/gv-offset-folding.ll | 2 +- test/CodeGen/AMDGPU/half.ll | 2 +- test/CodeGen/AMDGPU/hsa-note-no-func.ll | 6 +++--- test/CodeGen/AMDGPU/i1-copy-phi.ll | 2 +- test/CodeGen/AMDGPU/icmp64.ll | 4 ++-- test/CodeGen/AMDGPU/imm.ll | 2 +- test/CodeGen/AMDGPU/imm16.ll | 2 +- test/CodeGen/AMDGPU/indirect-addressing-si.ll | 4 ++-- test/CodeGen/AMDGPU/indirect-private-64.ll | 4 ++-- test/CodeGen/AMDGPU/infinite-loop.ll | 4 ++-- test/CodeGen/AMDGPU/inline-asm.ll | 2 +- test/CodeGen/AMDGPU/insert_vector_elt.ll | 2 +- test/CodeGen/AMDGPU/kernel-args.ll | 2 +- test/CodeGen/AMDGPU/large-alloca-graphics.ll | 2 +- test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.i32.ll | 4 ++-- test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll | 6 +++--- test/CodeGen/AMDGPU/llvm.AMDGPU.clamp.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll | 4 ++-- test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.fract.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll | 12 ++++++------ test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 4 ++-- test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll | 4 ++-- test/CodeGen/AMDGPU/llvm.amdgcn.s.memtime.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.sffbh.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.sin.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.sin.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll | 4 ++-- test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll | 6 +++--- test/CodeGen/AMDGPU/llvm.ceil.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.cos.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.exp2.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.floor.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.fma.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 4 ++-- test/CodeGen/AMDGPU/llvm.log2.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.memcpy.ll | 2 +- test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll | 4 ++-- test/CodeGen/AMDGPU/llvm.rint.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.round.ll | 2 +- test/CodeGen/AMDGPU/llvm.sin.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.sqrt.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.trunc.f16.ll | 2 +- test/CodeGen/AMDGPU/load-constant-f64.ll | 2 +- test/CodeGen/AMDGPU/load-constant-i1.ll | 2 +- test/CodeGen/AMDGPU/load-constant-i16.ll | 2 +- test/CodeGen/AMDGPU/load-constant-i32.ll | 2 +- test/CodeGen/AMDGPU/load-constant-i64.ll | 2 +- test/CodeGen/AMDGPU/load-constant-i8.ll | 2 +- test/CodeGen/AMDGPU/load-global-f32.ll | 2 +- test/CodeGen/AMDGPU/load-global-f64.ll | 2 +- test/CodeGen/AMDGPU/load-global-i1.ll | 2 +- test/CodeGen/AMDGPU/load-global-i16.ll | 2 +- test/CodeGen/AMDGPU/load-global-i32.ll | 2 +- test/CodeGen/AMDGPU/load-global-i64.ll | 2 +- test/CodeGen/AMDGPU/load-global-i8.ll | 2 +- test/CodeGen/AMDGPU/load-local-i32.ll | 2 +- test/CodeGen/AMDGPU/load-local-i8.ll | 2 +- test/CodeGen/AMDGPU/load-weird-sizes.ll | 2 +- test/CodeGen/AMDGPU/local-64.ll | 4 ++-- test/CodeGen/AMDGPU/local-atomics.ll | 2 +- test/CodeGen/AMDGPU/local-atomics64.ll | 2 +- test/CodeGen/AMDGPU/local-stack-slot-bug.ll | 2 +- test/CodeGen/AMDGPU/local-stack-slot-offset.ll | 2 +- test/CodeGen/AMDGPU/lshl.ll | 2 +- test/CodeGen/AMDGPU/lshr.ll | 2 +- test/CodeGen/AMDGPU/mad_int24.ll | 2 +- test/CodeGen/AMDGPU/mad_uint24.ll | 6 +++--- test/CodeGen/AMDGPU/madak.ll | 2 +- test/CodeGen/AMDGPU/madmk.ll | 2 +- test/CodeGen/AMDGPU/max.i16.ll | 2 +- test/CodeGen/AMDGPU/merge-store-usedef.ll | 2 +- test/CodeGen/AMDGPU/min.ll | 2 +- test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll | 3 +-- test/CodeGen/AMDGPU/mul.ll | 2 +- test/CodeGen/AMDGPU/mul_int24.ll | 2 +- test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | 2 +- test/CodeGen/AMDGPU/operand-spacing.ll | 4 ++-- test/CodeGen/AMDGPU/or.ll | 2 +- test/CodeGen/AMDGPU/rcp-pattern.ll | 2 +- test/CodeGen/AMDGPU/readcyclecounter.ll | 4 ++-- test/CodeGen/AMDGPU/reduce-load-width-alignment.ll | 2 +- test/CodeGen/AMDGPU/reg-coalescer-sched-crash.ll | 2 +- test/CodeGen/AMDGPU/reorder-stores.ll | 4 ++-- test/CodeGen/AMDGPU/rotl.i64.ll | 2 +- test/CodeGen/AMDGPU/rotr.i64.ll | 2 +- test/CodeGen/AMDGPU/rotr.ll | 2 +- test/CodeGen/AMDGPU/s_addk_i32.ll | 2 +- test/CodeGen/AMDGPU/s_movk_i32.ll | 2 +- test/CodeGen/AMDGPU/s_mulk_i32.ll | 4 ++-- test/CodeGen/AMDGPU/scalar_to_vector.ll | 2 +- test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll | 2 +- test/CodeGen/AMDGPU/sdiv.ll | 2 +- test/CodeGen/AMDGPU/sdivrem24.ll | 2 +- test/CodeGen/AMDGPU/sdivrem64.ll | 2 +- test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll | 2 +- test/CodeGen/AMDGPU/select-i1.ll | 2 +- test/CodeGen/AMDGPU/select-vectors.ll | 2 +- test/CodeGen/AMDGPU/select.f16.ll | 2 +- test/CodeGen/AMDGPU/selectcc-opt.ll | 4 ++-- test/CodeGen/AMDGPU/setcc-opt.ll | 2 +- test/CodeGen/AMDGPU/setcc64.ll | 2 +- test/CodeGen/AMDGPU/seto.ll | 2 +- test/CodeGen/AMDGPU/sext-in-reg.ll | 2 +- test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll | 2 +- test/CodeGen/AMDGPU/sgpr-copy.ll | 2 +- test/CodeGen/AMDGPU/shl.ll | 2 +- test/CodeGen/AMDGPU/shl_add_ptr.ll | 2 +- test/CodeGen/AMDGPU/si-annotate-cf.ll | 2 +- test/CodeGen/AMDGPU/si-lod-bias.ll | 2 +- test/CodeGen/AMDGPU/si-sgpr-spill.ll | 2 +- test/CodeGen/AMDGPU/si-spill-cf.ll | 2 +- test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll | 4 ++-- test/CodeGen/AMDGPU/si-vector-hang.ll | 2 +- test/CodeGen/AMDGPU/sign_extend.ll | 2 +- test/CodeGen/AMDGPU/sint_to_fp.i64.ll | 2 +- test/CodeGen/AMDGPU/sint_to_fp.ll | 4 ++-- test/CodeGen/AMDGPU/sitofp.f16.ll | 2 +- test/CodeGen/AMDGPU/smed3.ll | 2 +- test/CodeGen/AMDGPU/sminmax.ll | 4 ++-- test/CodeGen/AMDGPU/smrd-vccz-bug.ll | 2 +- test/CodeGen/AMDGPU/smrd.ll | 2 +- test/CodeGen/AMDGPU/sopk-compares.ll | 2 +- test/CodeGen/AMDGPU/sra.ll | 2 +- test/CodeGen/AMDGPU/srl.ll | 2 +- test/CodeGen/AMDGPU/store-global.ll | 2 +- test/CodeGen/AMDGPU/store-v3i64.ll | 2 +- test/CodeGen/AMDGPU/sub.i16.ll | 2 +- test/CodeGen/AMDGPU/trunc-bitcast-vector.ll | 2 +- test/CodeGen/AMDGPU/trunc-cmp-constant.ll | 4 ++-- test/CodeGen/AMDGPU/trunc-store-i1.ll | 4 ++-- test/CodeGen/AMDGPU/trunc-store.ll | 2 +- test/CodeGen/AMDGPU/uaddo.ll | 2 +- test/CodeGen/AMDGPU/udiv.ll | 2 +- test/CodeGen/AMDGPU/udivrem.ll | 2 +- test/CodeGen/AMDGPU/udivrem24.ll | 2 +- test/CodeGen/AMDGPU/udivrem64.ll | 2 +- test/CodeGen/AMDGPU/uint_to_fp.i64.ll | 4 ++-- test/CodeGen/AMDGPU/uint_to_fp.ll | 4 ++-- test/CodeGen/AMDGPU/uitofp.f16.ll | 2 +- test/CodeGen/AMDGPU/umed3.ll | 2 +- test/CodeGen/AMDGPU/unaligned-load-store.ll | 2 +- test/CodeGen/AMDGPU/uniform-cfg.ll | 2 +- test/CodeGen/AMDGPU/urecip.ll | 6 +++--- test/CodeGen/AMDGPU/urem.ll | 2 +- test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll | 2 +- test/CodeGen/AMDGPU/v_cndmask.ll | 2 +- test/CodeGen/AMDGPU/v_mac.ll | 4 ++-- test/CodeGen/AMDGPU/v_mac_f16.ll | 16 ++++++++-------- test/CodeGen/AMDGPU/v_madak_f16.ll | 2 +- .../AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll | 4 ++-- test/CodeGen/AMDGPU/vselect.ll | 2 +- test/CodeGen/AMDGPU/wait.ll | 8 ++++---- test/CodeGen/AMDGPU/waitcnt-flat.ll | 2 +- test/CodeGen/AMDGPU/xor.ll | 2 +- test/CodeGen/AMDGPU/zero_extend.ll | 2 +- 276 files changed, 391 insertions(+), 379 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 10 months

[compiler-rt] branch master updated (1726b7b -> 05a7fb8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository compiler-rt. from 1726b7b Fix pc_array bounds check to use elements instead of bytes new 05a7fb8 [tsan] Enable ignore_noninstrumented_modules=1 on Darwin by default The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/tsan/rtl/tsan_flags.inc | 2 +- test/tsan/Darwin/dispatch_main.mm | 2 +- test/tsan/Darwin/dispatch_once_deadlock.mm | 2 +- test/tsan/Darwin/gcd-after.mm | 2 +- test/tsan/Darwin/gcd-apply-race.mm | 2 +- test/tsan/Darwin/gcd-apply.mm | 2 +- test/tsan/Darwin/gcd-async-norace.mm | 2 +- test/tsan/Darwin/gcd-async-race.mm | 2 +- test/tsan/Darwin/gcd-barrier-race.mm | 2 +- test/tsan/Darwin/gcd-barrier.mm | 2 +- test/tsan/Darwin/gcd-blocks.mm | 2 +- test/tsan/Darwin/gcd-data.mm | 2 +- test/tsan/Darwin/gcd-fd.mm | 2 +- test/tsan/Darwin/gcd-groups-destructor.mm | 2 +- test/tsan/Darwin/gcd-groups-leave.mm | 2 +- test/tsan/Darwin/gcd-groups-norace.mm | 2 +- test/tsan/Darwin/gcd-groups-stress.mm | 2 +- test/tsan/Darwin/gcd-io-barrier-race.mm | 2 +- test/tsan/Darwin/gcd-io-barrier.mm | 2 +- test/tsan/Darwin/gcd-io-cleanup.mm | 2 +- test/tsan/Darwin/gcd-io-race.mm | 2 +- test/tsan/Darwin/gcd-io.mm | 2 +- test/tsan/Darwin/gcd-once.mm | 2 +- test/tsan/Darwin/gcd-semaphore-norace.mm | 2 +- test/tsan/Darwin/gcd-serial-queue-norace.mm | 2 +- test/tsan/Darwin/gcd-source-cancel.mm | 2 +- test/tsan/Darwin/gcd-source-cancel2.mm | 2 +- test/tsan/Darwin/gcd-source-event.mm | 2 +- test/tsan/Darwin/gcd-source-event2.mm | 2 +- test/tsan/Darwin/gcd-source-registration.mm | 2 +- test/tsan/Darwin/gcd-source-registration2.mm | 2 +- test/tsan/Darwin/gcd-source-serial.mm | 2 +- test/tsan/Darwin/gcd-suspend.mm | 2 +- test/tsan/Darwin/gcd-sync-norace.mm | 2 +- test/tsan/Darwin/gcd-sync-race.mm | 2 +- test/tsan/Darwin/gcd-target-queue-norace.mm | 2 +- test/tsan/Darwin/ignore-noninstrumented.mm | 2 +- test/tsan/Darwin/ignored-interceptors.mm | 6 +++--- test/tsan/Darwin/libcxx-call-once.mm | 2 +- test/tsan/Darwin/libcxx-future.mm | 2 +- test/tsan/Darwin/libcxx-shared-ptr-recursive.mm | 2 +- test/tsan/Darwin/libcxx-shared-ptr-stress.mm | 2 +- test/tsan/Darwin/libcxx-shared-ptr.mm | 2 +- test/tsan/Darwin/lit.local.cfg | 2 ++ test/tsan/Darwin/norace-objcxx-run-time.mm | 2 +- test/tsan/Darwin/objc-double-property.mm | 8 ++++---- test/tsan/Darwin/objc-simple.mm | 2 +- test/tsan/Darwin/xpc-race.mm | 2 +- test/tsan/Darwin/xpc.mm | 2 +- test/tsan/Unit/lit.site.cfg.in | 7 +++++++ test/tsan/lit.cfg | 4 ++++ 51 files changed, 66 insertions(+), 53 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 10 months

[lld] branch master updated (afa842d -> d768b3a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from afa842d [ELF] - Fixed crash after incrementing end iterator. new d768b3a Add a file comment to SyntheticSections.h. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ELF/SyntheticSections.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 10 months

[llvm] branch master updated (815bff1 -> 706238d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 815bff1 Demangle: correct demangling for CV-qualified functions new 706238d Explicitly promote indirect calls before sample profile annotation. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Transforms/IPO/SampleProfile.cpp | 24 ++++++++++++---- .../SampleProfile/Inputs/indirect-call.prof | 6 ++++ test/Transforms/SampleProfile/indirect-call.ll | 33 ++++++++++++++++++++++ 3 files changed, 58 insertions(+), 5 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 10 months

[clang] branch master updated (703ba99 -> eeb00e3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 703ba99 IRGen: Factor out function CodeGenAction::loadModule. NFCI. new eeb00e3 Strengthen test from r292632 to also check we get the manglin [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/CodeGenCXX/mangle.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 10 months

[zorg] branch master updated (6f23f4f -> 56fcf30)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository zorg. from 6f23f4f Revert "[asan] Enable -fsanitize-address-use-after-scope on s [...] new 56fcf30 [zorg] Send CUDA buildbot notifications to myself. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: buildbot/osuosl/master/config/status.py | 9 +++++++++ 1 file changed, 9 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 10 months

[binutils-gdb] branch master updated (666c6af -> 373832b)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 666c6af RISC-V gas: Remove em=linux from configure.tgt new 373832b Fix typo in ExitedEvent doc The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/doc/ChangeLog | 4 ++++ gdb/doc/python.texi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 10 months

[llvm] branch master updated (d310857 -> 815bff1)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from d310857 Revert [AMDGPU][mc][tests][NFC] Add coverage/smoke tests for [...] new ed1b025 Demangle: use named values for CV qualifiers new 815bff1 Demangle: correct demangling for CV-qualified functions The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Demangle/ItaniumDemangle.cpp | 45 ++++++++++++++++++++++++---------------- 1 file changed, 27 insertions(+), 18 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 10 months

[llvm] branch master updated (6562a03 -> d310857)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 6562a03 AMDGPU/SI: Give up in promote alloca when a pointer may be captured. new 0fbee48 Remove the load hoisting code of MLSM, it is completely subsu [...] new d310857 Revert [AMDGPU][mc][tests][NFC] Add coverage/smoke tests for [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Transforms/Scalar/MergedLoadStoreMotion.cpp | 176 +- test/MC/AMDGPU/gfx7_asm_all.s | 63301 ------------- test/MC/AMDGPU/gfx8_asm_all.s | 90229 ------------------- test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt | 87676 ------------------ .../{InstMerge => GVNHoist}/ld_hoist1.ll | 2 +- .../{InstMerge => GVNHoist}/ld_hoist_st_sink.ll | 8 +- 6 files changed, 7 insertions(+), 241385 deletions(-) delete mode 100644 test/MC/AMDGPU/gfx7_asm_all.s delete mode 100644 test/MC/AMDGPU/gfx8_asm_all.s delete mode 100644 test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt rename test/Transforms/{InstMerge => GVNHoist}/ld_hoist1.ll (97%) rename test/Transforms/{InstMerge => GVNHoist}/ld_hoist_st_sink.ll (96%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 10 months

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Tcwg-commits January 2017