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from f3d4e46 Use "llvm-objdump -s" instead of hexdump command.
new 65e9dbe Split InputSectionDescription::Sort into SortInner and SortOuter.
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Summary of changes:
ELF/LinkerScript.cpp | 83 ++++++++++++++++++++++++++--------------------------
ELF/LinkerScript.h | 5 ++--
2 files changed, 44 insertions(+), 44 deletions(-)
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from 749f338 [LIT][Darwin] Preload libclang_rt.asan_osx_dynamic.dylib when [...]
new 9615dd0 [InstCombine] use m_APInt to allow icmp eq (mul X, C1), C2 fo [...]
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lib/Transforms/InstCombine/InstCombineCompares.cpp | 11 +++++------
test/Transforms/InstCombine/icmp.ll | 3 +--
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from df7cecc GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR.
new 74bccc3 Clean up the logic of the Archive::Child::Child() with an ass [...]
new 749f338 [LIT][Darwin] Preload libclang_rt.asan_osx_dynamic.dylib when [...]
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lib/Object/Archive.cpp | 44 +++++++++++++++++++------------------
test/lit.cfg | 27 +++++++++++++++++++++++
test/tools/lto/hide-linkonce-odr.ll | 2 +-
test/tools/lto/opt-level.ll | 4 ++--
4 files changed, 53 insertions(+), 24 deletions(-)
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from 156db7c Avoid re-entrancy between __sanitizer::Report, OutputDebugStr [...]
new 8a88869 builtins: split out the EABI and VFP ARM sources
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lib/builtins/CMakeLists.txt | 98 +++++++++++++++++++++++++--------------------
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from b7f706d [CloneFunction] Add a testcase for r277691/r277693
new 3ca2c43 GlobalISel: add support for G_MUL
new df7cecc GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR.
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include/llvm/Target/GenericOpcodes.td | 8 ++++++
include/llvm/Target/TargetOpcodes.def | 11 ++++++--
lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 ++
lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp | 10 +++++--
lib/Target/AArch64/AArch64MachineLegalizer.cpp | 2 +-
.../AArch64/GlobalISel/arm64-irtranslator.ll | 11 ++++++++
test/CodeGen/AArch64/GlobalISel/legalize-and.mir | 32 ++++++++++++++++++++++
test/CodeGen/AArch64/GlobalISel/legalize-mul.mir | 32 ++++++++++++++++++++++
test/CodeGen/AArch64/GlobalISel/legalize-or.mir | 32 ++++++++++++++++++++++
test/CodeGen/AArch64/GlobalISel/legalize-sub.mir | 32 ++++++++++++++++++++++
test/CodeGen/AArch64/GlobalISel/legalize-xor.mir | 32 ++++++++++++++++++++++
11 files changed, 199 insertions(+), 5 deletions(-)
create mode 100644 test/CodeGen/AArch64/GlobalISel/legalize-and.mir
create mode 100644 test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
create mode 100644 test/CodeGen/AArch64/GlobalISel/legalize-or.mir
create mode 100644 test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
create mode 100644 test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
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from c123b93 [Mach0YAML] Change n_type from uint8_t to llvm::yaml::Hex8
new b7f706d [CloneFunction] Add a testcase for r277691/r277693
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test/Transforms/Inline/inline_constprop.ll | 21 +++++++++++++++++++++
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from c7642e0 [MachO] Factor out some common code in the Driver.
new f3d4e46 Use "llvm-objdump -s" instead of hexdump command.
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test/ELF/linkerscript/linkerscript-sections-padding.s | 16 ++++++++--------
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from ec9004d PR c++/72415 - member template with fold-expression constraint
new fa33ffc PR target/72805 * config/i386/avx512fintrin.h (_mm512_cmp_e [...]
new 10d5c37 [gcc] 2016-08-04 Michael Meissner <meissner(a)linux.vnet.ibm.com>
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gcc/ChangeLog | 29 ++++++-
gcc/config/i386/avx512fintrin.h | 48 +++++------
gcc/config/rs6000/rs6000.c | 81 +++++++++++++-----
gcc/testsuite/ChangeLog | 10 +++
gcc/testsuite/gcc.target/powerpc/float128-cmp.c | 106 ++++++++++++++++++++++++
5 files changed, 224 insertions(+), 50 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/float128-cmp.c
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from f50f064 Daily bump.
new 5ef18ad0 PR target/72805 * config/i386/avx512fintrin.h (_mm512_cmp_e [...]
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gcc/ChangeLog | 17 +++++++++++----
gcc/config/i386/avx512fintrin.h | 48 ++++++++++++++++++++---------------------
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from 6857d7c GlobalISel: implement narrowing for G_ADD.
new c123b93 [Mach0YAML] Change n_type from uint8_t to llvm::yaml::Hex8
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include/llvm/ObjectYAML/MachOYAML.h | 2 +-
test/ObjectYAML/MachO/symtab.yaml | 120 ++++++++++++++++++------------------
2 files changed, 61 insertions(+), 61 deletions(-)
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