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unknown user pushed a change to branch master
in repository binutils-gdb.
from efc67f6 Automatic date update in version.in
new fa1c017 [ARC] Fix/improve small data support.
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Summary of changes:
include/ChangeLog | 4 ++++
include/elf/arc-reloc.def | 2 +-
ld/ChangeLog | 9 +++++++++
ld/emulparams/arcelf.sh | 2 +-
ld/testsuite/ld-arc/arc.exp | 8 ++++++++
ld/testsuite/ld-arc/sda-relocs.dd | 23 +++++++++++++++++++++++
ld/testsuite/ld-arc/sda-relocs.ld | 20 ++++++++++++++++++++
ld/testsuite/ld-arc/sda-relocs.rd | 15 +++++++++++++++
ld/testsuite/ld-arc/sda-relocs.s | 32 ++++++++++++++++++++++++++++++++
9 files changed, 113 insertions(+), 2 deletions(-)
create mode 100644 ld/testsuite/ld-arc/sda-relocs.dd
create mode 100644 ld/testsuite/ld-arc/sda-relocs.ld
create mode 100644 ld/testsuite/ld-arc/sda-relocs.rd
create mode 100644 ld/testsuite/ld-arc/sda-relocs.s
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unknown user pushed a change to branch master
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from 84f3bec [InstCombine] Masked loads with undef masks can fold to normal loads
new 05488db This implements a more optimal algorithm for selecting a base [...]
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Summary of changes:
include/llvm/Analysis/TargetTransformInfo.h | 16 ++++
include/llvm/Analysis/TargetTransformInfoImpl.h | 5 +
include/llvm/Transforms/Scalar/ConstantHoisting.h | 3 +
lib/Analysis/TargetTransformInfo.cpp | 8 ++
lib/Target/ARM/ARMTargetTransformInfo.cpp | 11 +++
lib/Target/ARM/ARMTargetTransformInfo.h | 3 +
lib/Transforms/Scalar/ConstantHoisting.cpp | 105 +++++++++++++++++++--
.../ARM/const-addr-no-neg-offset.ll | 42 +++++++++
8 files changed, 186 insertions(+), 7 deletions(-)
create mode 100644 test/Transforms/ConstantHoisting/ARM/const-addr-no-neg-offset.ll
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from a478ead Added test for setting breakpoints by basename and fullname.
new d7f021c Fix -break-enable/-break-disable commands (MI)
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.../test/tools/lldb-mi/breakpoint/TestMiBreak.py | 45 ++++++++++++++++++++++
tools/lldb-mi/MICmdCmdBreak.cpp | 26 ++-----------
2 files changed, 48 insertions(+), 23 deletions(-)
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from cc0d731 [AVX512] Implement EXTLOAD lowering with patterns to select e [...]
new 6d67ce1 Simplify llvm.masked.load w/ undef masks
new 84f3bec [InstCombine] Masked loads with undef masks can fold to normal loads
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lib/Analysis/ConstantFolding.cpp | 35 ++++++++++++++----------
lib/Analysis/InstructionSimplify.cpp | 26 ++++++++++++++----
lib/Transforms/InstCombine/InstCombineCalls.cpp | 25 +++++++++++++----
test/Transforms/InstCombine/masked_intrinsics.ll | 9 ++++++
test/Transforms/InstSimplify/call.ll | 7 +++++
5 files changed, 77 insertions(+), 25 deletions(-)
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from 940c907 [X86] Fix stupid typo in isel lowering.
new cc0d731 [AVX512] Implement EXTLOAD lowering with patterns to select e [...]
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lib/Target/X86/X86InstrAVX512.td | 122 ++++++++++++++++++++++++---------------
1 file changed, 76 insertions(+), 46 deletions(-)
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unknown user pushed a change to branch master
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from 1b09fad Add C++ dependencies to xray runtime
new d5dff99 Use hasFlag instead of hasArg
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lib/Driver/Tools.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
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from 04e6d26 AMDGPU/R600: Remove intrinsics with no tests and no users
new 4d120e9 AMDGPU/R600: Delete/rename intrinsics no longer used by mesa
new 940c907 [X86] Fix stupid typo in isel lowering.
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Summary of changes:
lib/Target/AMDGPU/AMDGPU.h | 1 -
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 1 -
lib/Target/AMDGPU/CMakeLists.txt | 1 -
lib/Target/AMDGPU/R600ISelLowering.cpp | 2 +-
lib/Target/AMDGPU/R600Instructions.td | 9 +-
lib/Target/AMDGPU/R600Intrinsics.td | 16 +-
.../AMDGPU/R600TextureIntrinsicsReplacer.cpp | 303 ---
lib/Target/X86/X86InstrCompiler.td | 2 +-
test/CodeGen/AMDGPU/big_alu.ll | 2274 ++++++++++----------
test/CodeGen/AMDGPU/dot4-folding.ll | 27 -
test/CodeGen/AMDGPU/fetch-limits.r600.ll | 64 +-
test/CodeGen/AMDGPU/fetch-limits.r700+.ll | 78 +-
test/CodeGen/AMDGPU/literals.ll | 4 +-
test/CodeGen/AMDGPU/llvm.AMDGPU.cube.ll | 78 +-
test/CodeGen/AMDGPU/llvm.AMDGPU.tex.ll | 42 -
.../{llvm.amdgpu.dp4.ll => llvm.r600.dot4.ll} | 4 +-
test/CodeGen/AMDGPU/llvm.r600.tex.ll | 65 +
test/CodeGen/AMDGPU/load-input-fold.ll | 4 +-
test/CodeGen/AMDGPU/max-literals.ll | 6 +-
test/CodeGen/AMDGPU/predicate-dp4.ll | 4 +-
test/CodeGen/AMDGPU/pv-packing.ll | 6 +-
test/CodeGen/AMDGPU/pv.ll | 8 +-
...-infinite-loop-bug-while-reorganizing-vector.ll | 93 +-
test/CodeGen/AMDGPU/rv7x0_count3.ll | 77 +-
test/CodeGen/AMDGPU/shared-op-cycle.ll | 4 +-
test/CodeGen/X86/add.ll | 36 +
26 files changed, 1487 insertions(+), 1722 deletions(-)
delete mode 100644 lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp
delete mode 100644 test/CodeGen/AMDGPU/dot4-folding.ll
delete mode 100644 test/CodeGen/AMDGPU/llvm.AMDGPU.tex.ll
rename test/CodeGen/AMDGPU/{llvm.amdgpu.dp4.ll => llvm.r600.dot4.ll} (69%)
create mode 100644 test/CodeGen/AMDGPU/llvm.r600.tex.ll
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unknown user pushed a change to branch master
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from f83e27b [lld] Update LLD for Archive::child_iterator change in LLVM r275361.
new ba6aa98 Attempt to unbreak msan bot.
new ab462ab Set sh_addralign to 1 instead of 0.
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ELF/OutputSections.cpp | 6 ++----
ELF/OutputSections.h | 7 ++-----
ELF/Target.cpp | 5 ++++-
test/ELF/eh-frame-hdr.s | 2 +-
4 files changed, 9 insertions(+), 11 deletions(-)
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unknown user pushed a change to branch master
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from cee9af9 XRay: Add entry and exit sleds
new 5906ff8 AMDGPU: Remove dead code
new fb5f780 AMDGPU: Fix test not actually testing anything
new 759af1e AMDGPU: Remove unused intrinsics
new 04e6d26 AMDGPU/R600: Remove intrinsics with no tests and no users
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lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 9 --
lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 -
lib/Target/AMDGPU/AMDGPUInstructions.td | 8 +-
lib/Target/AMDGPU/AMDGPUIntrinsics.td | 4 -
lib/Target/AMDGPU/R600ISelLowering.cpp | 24 +----
lib/Target/AMDGPU/R600Instructions.td | 30 +-----
lib/Target/AMDGPU/R600Intrinsics.td | 29 ++----
lib/Target/AMDGPU/SIISelLowering.cpp | 8 --
test/CodeGen/AMDGPU/llvm.AMDGPU.cvt_f32_ubyte.ll | 107 ---------------------
test/CodeGen/AMDGPU/promote-alloca-lifetime.ll | 24 +++++
.../AMDGPU/promote-alloca-unhandled-intrinsic.ll | 8 +-
11 files changed, 43 insertions(+), 209 deletions(-)
delete mode 100644 test/CodeGen/AMDGPU/llvm.AMDGPU.cvt_f32_ubyte.ll
create mode 100644 test/CodeGen/AMDGPU/promote-alloca-lifetime.ll
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from 4194818 [OpenMP] Sema and parsing for 'target parallel for simd' pragma
new 1b09fad Add C++ dependencies to xray runtime
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lib/Driver/Tools.cpp | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
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