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from 425b157 [AArch64] Replace insn to zero up SIMD registers
new 8a560c3 2016-04-27 Bill Schmidt <wschmidt(a)linux.vnet.ibm.com>
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Summary of changes:
gcc/ChangeLog | 39 ++++
gcc/config/rs6000/altivec.md | 104 +++++++---
gcc/config/rs6000/rs6000-c.c | 124 ++++++++++++
gcc/config/rs6000/rs6000.c | 465 ++++++++++++++++++++++++++++++++++++++-----
gcc/config/rs6000/vector.md | 18 +-
5 files changed, 671 insertions(+), 79 deletions(-)
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unknown user pushed a change to branch master
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from 91e2a20 Fix build failure under NDEBUG.
new 54b806a [RuntimeDyld] Plumb Error/Expected through the internals of R [...]
new 4ede31d [InstCombine][AVX2] Add AVX2 per-element vector shift tests
new 2076e88 [ARM] Set correct successors in CMPXCHG pseudo expansion.
new 920e60d [AArch64] Set correct successors in CMPXCHG pseudo expansion.
new 67e6d9a [AArch64] Set AddPristinesAndCSRs to expandCMP_SWAP LivePhysRegs.
new 5678798 [ARM] Set AddPristinesAndCSRs to expandCMP_SWAP LivePhysRegs.
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Summary of changes:
include/llvm/ExecutionEngine/RuntimeDyld.h | 13 +
lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp | 209 ++++++---
.../RuntimeDyld/RuntimeDyldCOFF.cpp | 9 +-
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp | 101 +++--
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h | 18 +-
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h | 59 +--
.../RuntimeDyld/RuntimeDyldMachO.cpp | 96 +++--
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.h | 27 +-
.../RuntimeDyld/Targets/RuntimeDyldCOFFI386.h | 22 +-
.../RuntimeDyld/Targets/RuntimeDyldCOFFX86_64.h | 27 +-
.../RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h | 19 +-
.../RuntimeDyld/Targets/RuntimeDyldMachOARM.h | 64 ++-
.../RuntimeDyld/Targets/RuntimeDyldMachOI386.h | 79 ++--
.../RuntimeDyld/Targets/RuntimeDyldMachOX86_64.h | 29 +-
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp | 10 +-
lib/Target/ARM/ARMExpandPseudoInsts.cpp | 10 +-
test/CodeGen/AArch64/cmpxchg-O0.ll | 2 +-
test/CodeGen/ARM/cmpxchg-O0.ll | 6 +-
test/Transforms/InstCombine/x86-vector-shifts.ll | 467 +++++++++++++++++++++
19 files changed, 967 insertions(+), 300 deletions(-)
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unknown user pushed a change to branch master
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from c0cada6 Reduce usage of isRelRelative.
new 221e948 ELF: Create .gnu.version and .gnu.version_r sections when lin [...]
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Summary of changes:
ELF/InputFiles.cpp | 61 ++++++++++++++++++++++-
ELF/InputFiles.h | 19 +++++++
ELF/OutputSections.cpp | 112 ++++++++++++++++++++++++++++++++++++++++++
ELF/OutputSections.h | 49 ++++++++++++++++++
ELF/Symbols.h | 14 +++++-
ELF/Writer.cpp | 13 ++++-
test/ELF/Inputs/verneed.so.sh | 58 ++++++++++++++++++++++
test/ELF/Inputs/verneed1.so | Bin 0 -> 2632 bytes
test/ELF/Inputs/verneed2.so | Bin 0 -> 2200 bytes
test/ELF/verneed-local.s | 8 +++
test/ELF/verneed.s | 104 +++++++++++++++++++++++++++++++++++++++
11 files changed, 434 insertions(+), 4 deletions(-)
create mode 100755 test/ELF/Inputs/verneed.so.sh
create mode 100755 test/ELF/Inputs/verneed1.so
create mode 100755 test/ELF/Inputs/verneed2.so
create mode 100644 test/ELF/verneed-local.s
create mode 100644 test/ELF/verneed.s
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unknown user pushed a change to branch master
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from d71b57d [X86]: Quit promoting 16 bit loads to 32 bit. Differential Re [...]
new 91e2a20 Fix build failure under NDEBUG.
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Summary of changes:
lib/CodeGen/StackColoring.cpp | 4 ++++
1 file changed, 4 insertions(+)
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unknown user pushed a change to branch master
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from 6313d5d maybe_set_first_label_num can take an rtx_code_label *
new 425b157 [AArch64] Replace insn to zero up SIMD registers
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Summary of changes:
gcc/ChangeLog | 12 +++++++++
gcc/config/aarch64/aarch64.md | 31 +++++++++++++----------
gcc/testsuite/gcc.target/aarch64/fmovd-zero-reg.c | 2 +-
gcc/testsuite/gcc.target/aarch64/fmovf-zero-reg.c | 2 +-
4 files changed, 31 insertions(+), 16 deletions(-)
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unknown user pushed a change to branch master
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from cb249e3 [libFuzzer] disable leak detection if we have tried it for 10 [...]
new d71b57d [X86]: Quit promoting 16 bit loads to 32 bit. Differential Re [...]
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lib/Target/X86/X86ISelLowering.cpp | 17 -----------------
test/CodeGen/X86/half.ll | 3 ++-
2 files changed, 2 insertions(+), 18 deletions(-)
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from 7a54485 Add optimization bisect opt-in calls for PowerPC passes
new 30f5316 [libFuzzer] disable leak detection if we have tried it for 10 [...]
new cb249e3 [libFuzzer] disable leak detection if we have tried it for 10 [...]
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lib/Fuzzer/FuzzerInternal.h | 1 +
lib/Fuzzer/FuzzerLoop.cpp | 9 +++++++++
lib/Fuzzer/test/AccumulateAllocationsTest.cpp | 17 +++++++++++++++++
lib/Fuzzer/test/CMakeLists.txt | 1 +
lib/Fuzzer/test/fuzzer-leak.test | 3 ++-
5 files changed, 30 insertions(+), 1 deletion(-)
create mode 100644 lib/Fuzzer/test/AccumulateAllocationsTest.cpp
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unknown user pushed a change to branch master
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from 69ffd3e Call TargetMachine::addEarlyAsPossiblePasses from BackendUtil.
new a2bd0ce Set the default C standard to C99 when targeting the PS4.
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include/clang/Frontend/CompilerInvocation.h | 2 ++
lib/Frontend/CompilerInvocation.cpp | 11 ++++++++---
test/FixIt/fixit-errors.c | 3 +++
test/Preprocessor/init.c | 8 +++++++-
test/Sema/attr-deprecated.c | 5 +++++
test/Sema/nullability.c | 14 +++++++++++++-
test/SemaObjC/objcbridge-attribute-arc.m | 5 ++++-
7 files changed, 42 insertions(+), 6 deletions(-)
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from ed52756 Refactor debugging code, NFC.
new 11dea5d [CodeGenPrepare] Don't sink a cast past its user
new 7a54485 Add optimization bisect opt-in calls for PowerPC passes
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lib/CodeGen/CodeGenPrepare.cpp | 5 +++++
lib/Target/PowerPC/PPCBoolRetToInt.cpp | 3 +++
lib/Target/PowerPC/PPCCTRLoops.cpp | 3 +++
lib/Target/PowerPC/PPCEarlyReturn.cpp | 3 +++
lib/Target/PowerPC/PPCLoopPreIncPrep.cpp | 3 +++
lib/Target/PowerPC/PPCMIPeephole.cpp | 2 ++
lib/Target/PowerPC/PPCQPXLoadSplat.cpp | 3 +++
lib/Target/PowerPC/PPCTargetMachine.cpp | 8 ++++---
lib/Target/PowerPC/PPCVSXFMAMutate.cpp | 3 +++
lib/Target/PowerPC/PPCVSXSwapRemoval.cpp | 3 +++
test/Transforms/CodeGenPrepare/X86/pr27536.ll | 32 +++++++++++++++++++++++++++
11 files changed, 65 insertions(+), 3 deletions(-)
create mode 100644 test/Transforms/CodeGenPrepare/X86/pr27536.ll
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unknown user pushed a change to branch master
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from 76be34f Renamed system plugin directory to address https://bugs.swift [...]
new 56b874c Added a testcase for the IR interpreter, ensuring that it beh [...]
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.../ir-interpreter}/Makefile | 3 +-
.../ir-interpreter/TestIRInterpreter.py | 70 ++++++++++++++++++++++
.../{top-level/dummy.cpp => ir-interpreter/main.c} | 0
3 files changed, 72 insertions(+), 1 deletion(-)
copy packages/Python/lldbsuite/test/{api/listeners => expression_command/ir-interp [...]
create mode 100644 packages/Python/lldbsuite/test/expression_command/ir-interprete [...]
copy packages/Python/lldbsuite/test/expression_command/{top-level/dummy.cpp => ir- [...]
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