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from 6ccdfdf [ASAN] Use struct instead of array in sancov.py
new 164bcc4 Revert "[sanitizer] Allow the sanitizer allocator to use a no [...]
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lib/sanitizer_common/sanitizer_allocator.h | 58 +++++++---------------
lib/sanitizer_common/sanitizer_posix_libcdep.cc | 3 +-
.../tests/sanitizer_allocator_testlib.cc | 3 +-
3 files changed, 21 insertions(+), 43 deletions(-)
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from d61a344 Revert "[LSAN] Fix test swapcontext.cc on MIPS"
new 7575ed5 [sanitizer] allow zero first parameter in MmapNoAccess; This [...]
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lib/sanitizer_common/sanitizer_posix_libcdep.cc | 3 ++-
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from 6caeee9 GC entries of SHF_MERGE sections.
new 2c2ac77 Trying to fix the windows build.
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ELF/InputSection.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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from 9caa67e ELF: Scan for undefined symbols in shlibs and symbols in dyna [...]
new d0a4536 Revert "GC entries of SHF_MERGE sections."
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ELF/InputSection.cpp | 73 +++-------------------------
ELF/InputSection.h | 6 +--
ELF/MarkLive.cpp | 37 ++++----------
ELF/OutputSections.cpp | 44 +++++++++++------
test/ELF/gc-sections-merge-addend.s | 39 ---------------
test/ELF/gc-sections-merge-implicit-addend.s | 39 ---------------
test/ELF/gc-sections-merge.s | 61 -----------------------
7 files changed, 48 insertions(+), 251 deletions(-)
delete mode 100644 test/ELF/gc-sections-merge-addend.s
delete mode 100644 test/ELF/gc-sections-merge-implicit-addend.s
delete mode 100644 test/ELF/gc-sections-merge.s
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unknown user pushed a change to branch hjl/pr70155/uros
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discards cd2a14c Extend STV pass to 64-bit mode
discards 5987792 Allow all 1s of integer in standard_sse_constant_p
discards b96c7d3 Allow all 1s of integer as standard SSE constants
new 3009ef6 Allow all 1s of integer as standard SSE constants
new 8e3f061 Extend STV pass to 64-bit mode
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gcc/config/i386/i386.c | 17 ++---------------
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unknown user pushed a change to branch master
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from 6252915 DAGCombiner: Relax alignment restriction when changing load type
new a436337 [unordered] Extend load/store type canonicalization to handle [...]
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.../InstCombine/InstCombineLoadStoreAlloca.cpp | 17 ++++++----
test/Transforms/InstCombine/atomic.ll | 39 ++++++++++++++++++++++
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from fdc9ad7 [SCEV] Extract out a `isSCEVExprNeverPoison` helper; NFCI
new 91e5e85 [EarlyCSE] Take the intersection of flags on instructions
new fd026c3 Fix some spelling mistakes
new 582e856 [GVN] Respect fast-math-flags on fcmps
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include/llvm/IR/InstrTypes.h | 29 ---------------
include/llvm/IR/Instruction.h | 29 +++++++++++++++
include/llvm/IR/Operator.h | 4 +-
lib/IR/Instruction.cpp | 64 ++++++++++++++++++++++++++++++++
lib/IR/Instructions.cpp | 56 ----------------------------
lib/Target/ARM/ARMConstantIslandPass.cpp | 4 +-
lib/Transforms/Scalar/EarlyCSE.cpp | 13 ++-----
lib/Transforms/Scalar/GVN.cpp | 43 +++++++++++----------
test/Transforms/EarlyCSE/flags.ll | 18 +++++++++
test/Transforms/GVN/flags.ll | 18 +++++++++
unittests/ProfileData/InstrProfTest.cpp | 2 +-
11 files changed, 158 insertions(+), 122 deletions(-)
create mode 100644 test/Transforms/EarlyCSE/flags.ll
create mode 100644 test/Transforms/GVN/flags.ll
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from c1499f8 [mips][microMIPS] Add R_MICROMIPS_PC18_S3 relocation
new fed867f [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS3 [...]
new 883a09c [InstCombine] Preserve fast math flags when combining PHIs
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lib/Target/Mips/MicroMips32r6InstrInfo.td | 4 +-
lib/Target/Mips/MicroMipsInstrFormats.td | 1 -
lib/Target/Mips/MicroMipsInstrInfo.td | 4 +
lib/Target/Mips/MipsInstrInfo.td | 8 +-
lib/Transforms/InstCombine/InstCombinePHI.cpp | 49 +++---------
test/CodeGen/Mips/brconlt.ll | 2 +
test/CodeGen/Mips/seteq.ll | 2 +
test/CodeGen/Mips/setltk.ll | 6 +-
test/CodeGen/Mips/setne.ll | 2 +
test/MC/Disassembler/Mips/micromips32r6/valid.txt | 4 +
test/MC/Mips/micromips32r6/valid.s | 4 +
.../InstCombine/phi-preserve-ir-flags.ll | 89 ++++++++++++++++++++++
12 files changed, 132 insertions(+), 43 deletions(-)
create mode 100644 test/Transforms/InstCombine/phi-preserve-ir-flags.ll
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from 2a10f07 litsupport-tests: Cleanup, do not hardcode lit path/name
new 3a16a9c Add new cmake caches for iOS setups
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cmake/caches/Release_Haswell.cmake | 2 --
cmake/caches/target-arm64-ios.cmake | 3 +++
cmake/caches/target-haswell.cmake | 2 ++
cmake/caches/target-thumbv7s-ios.cmake | 3 +++
cmake/caches/util/arch_flags.cmake | 4 ++++
cmake/caches/util/xcode_sdk.cmake | 30 ++++++++++++++++++++++++++++++
6 files changed, 42 insertions(+), 2 deletions(-)
delete mode 100644 cmake/caches/Release_Haswell.cmake
create mode 100644 cmake/caches/target-arm64-ios.cmake
create mode 100644 cmake/caches/target-haswell.cmake
create mode 100644 cmake/caches/target-thumbv7s-ios.cmake
create mode 100644 cmake/caches/util/arch_flags.cmake
create mode 100644 cmake/caches/util/xcode_sdk.cmake
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from 9d0b7e9 PM: Port SinkingPass to the new pass manager
new 57d47e7 [AArch64] Fix optimizeCondBranch logic.
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lib/Target/AArch64/AArch64InstrInfo.cpp | 10 +++++-----
test/CodeGen/AArch64/aarch64-tbz.ll | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
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