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from b78d89e [ThinLTO] Save 8B per summary entry by rearranging the fields (NFC)
new 1f1e461 AMDGPU: Fix missing commute table entries for cmpx
new 27bb0f0 DAG: Add helper for testing constant values
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Summary of changes:
include/llvm/CodeGen/SelectionDAG.h | 10 ++++++++++
lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 10 ++++++++++
lib/Target/AMDGPU/VOPCInstructions.td | 8 ++++----
3 files changed, 24 insertions(+), 4 deletions(-)
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unknown user pushed a change to branch master
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from a71730a Only substitute into type of non-type template parameter once [...]
new fc5c254 Sema: print qualified name for overload candidates
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Summary of changes:
include/clang/Basic/DiagnosticSemaKinds.td | 22 +++++++++++-----------
lib/Sema/SemaOverload.cpp | 2 +-
lib/Sema/SemaTemplateDeduction.cpp | 10 +++++-----
test/SemaCXX/template-ambiguous-overload.cpp | 16 ++++++++++++++++
4 files changed, 33 insertions(+), 17 deletions(-)
create mode 100644 test/SemaCXX/template-ambiguous-overload.cpp
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from ff4096b AMDGPU: Form more FMAs if fusion is allowed
new 121f865 AMDGPU: Check fast math flags in fadd/fsub combines
new 46e5f1c AMDGPU: Swap order of operands in fadd/fsub combine
new b78d89e [ThinLTO] Save 8B per summary entry by rearranging the fields (NFC)
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Summary of changes:
include/llvm/IR/ModuleSummaryIndex.h | 6 +--
lib/Target/AMDGPU/SIISelLowering.cpp | 27 +++++++----
lib/Target/AMDGPU/SIISelLowering.h | 3 +-
test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll | 16 +++----
test/CodeGen/AMDGPU/fmuladd.f16.ll | 4 +-
test/CodeGen/AMDGPU/fmuladd.f32.ll | 4 +-
test/CodeGen/AMDGPU/fmuladd.f64.ll | 63 +++++++++++++++++++++++++
7 files changed, 97 insertions(+), 26 deletions(-)
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from 121cd50 AMDGPU: Move combines into separate functions
new ff4096b AMDGPU: Form more FMAs if fusion is allowed
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lib/Target/AMDGPU/SIISelLowering.cpp | 75 +++--
lib/Target/AMDGPU/SIISelLowering.h | 1 +
test/CodeGen/AMDGPU/fmuladd.f16.ll | 467 ++++++++++++++++++++++++++++
test/CodeGen/AMDGPU/fmuladd.f32.ll | 583 +++++++++++++++++++++++++++++++++++
test/CodeGen/AMDGPU/fmuladd.f64.ll | 119 +++++++
test/CodeGen/AMDGPU/fmuladd.ll | 400 ------------------------
test/CodeGen/AMDGPU/mad-sub.ll | 420 -------------------------
7 files changed, 1215 insertions(+), 850 deletions(-)
create mode 100644 test/CodeGen/AMDGPU/fmuladd.f16.ll
create mode 100644 test/CodeGen/AMDGPU/fmuladd.f32.ll
create mode 100644 test/CodeGen/AMDGPU/fmuladd.f64.ll
delete mode 100644 test/CodeGen/AMDGPU/fmuladd.ll
delete mode 100644 test/CodeGen/AMDGPU/mad-sub.ll
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from d4a1e63 Driver: use the triple to query the arch, not the toolchain
new a71730a Only substitute into type of non-type template parameter once [...]
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lib/Sema/SemaTemplateDeduction.cpp | 61 +++++++++++++++++---------------------
1 file changed, 27 insertions(+), 34 deletions(-)
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from cee1c46 AMDGPU: Implement isFMAFasterThanFMulAndFAdd for f16
new 75c32f5 AMDGPU: Enable some f32 fadd/fsub combines for f16
new 121cd50 AMDGPU: Move combines into separate functions
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lib/Target/AMDGPU/SIISelLowering.cpp | 316 +++++++++++++-----------
lib/Target/AMDGPU/SIISelLowering.h | 5 +
test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll | 112 ++++++++-
test/CodeGen/AMDGPU/fmuladd.ll | 188 +++++++++++++-
test/CodeGen/AMDGPU/mad-sub.ll | 195 ++++++++++++++-
5 files changed, 666 insertions(+), 150 deletions(-)
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from a8dff18 AMDGPU: Allow rcp and rsq usage with f16
new 998b18c AMDGPU: setcc test cleanup
new cee1c46 AMDGPU: Implement isFMAFasterThanFMulAndFAdd for f16
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Summary of changes:
lib/Target/AMDGPU/SIISelLowering.cpp | 2 +
test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 53 ++++--
test/CodeGen/AMDGPU/setcc.ll | 172 +++++++++---------
test/CodeGen/AMDGPU/setcc64.ll | 306 ++++++++++++++++----------------
4 files changed, 287 insertions(+), 246 deletions(-)
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from 50b4952 Clear the PendingTypeTests vector after moving from it.
new 15a4f4e AMDGPU: Update isFPImmLegal for f16
new 0bb2ef4 AMDGPU: Implement f16 fcanonicalize
new 4bb9991 AMDGPU: Custom lower f16 fdiv
new a8dff18 AMDGPU: Allow rcp and rsq usage with f16
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Summary of changes:
lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 1 -
lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 3 +-
lib/Target/AMDGPU/AMDGPUInstructions.td | 1 +
lib/Target/AMDGPU/SIISelLowering.cpp | 36 ++++-
lib/Target/AMDGPU/SIISelLowering.h | 1 +
lib/Target/AMDGPU/SIInstructions.td | 5 +
test/CodeGen/AMDGPU/fcanonicalize.f16.ll | 172 ++++++++++++++++++++++
test/CodeGen/AMDGPU/fdiv.f16.ll | 224 ++++++++++++++++++++++++++---
8 files changed, 416 insertions(+), 27 deletions(-)
create mode 100644 test/CodeGen/AMDGPU/fcanonicalize.f16.ll
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from aa365cb Add the alloc_size attribute to clang, attempt 2.
new 8c058dd Driver: rename parameter to reduce confusion
new a1ab1a8 Driver: remove unnecessary parameter
new d4a1e63 Driver: use the triple to query the arch, not the toolchain
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lib/Driver/Tools.cpp | 50 +++++++++++++++++++++++---------------------------
1 file changed, 23 insertions(+), 27 deletions(-)
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from a8bebbe Perform type-checking for a converted constant expression in [...]
new aa365cb Add the alloc_size attribute to clang, attempt 2.
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Summary of changes:
include/clang/Basic/Attr.td | 9 +
include/clang/Basic/AttrDocs.td | 38 ++
include/clang/Basic/DiagnosticSemaKinds.td | 3 +
lib/AST/ExprConstant.cpp | 616 +++++++++++++++++--------
lib/CodeGen/CGBlocks.cpp | 24 +-
lib/CodeGen/CGCall.cpp | 8 +
lib/CodeGen/CodeGenFunction.h | 4 +-
lib/CodeGen/CodeGenModule.h | 14 +
lib/Sema/SemaDeclAttr.cpp | 88 ++++
test/CodeGen/alloc-size.c | 352 ++++++++++++++
test/CodeGenCXX/alloc-size.cpp | 72 +++
test/CodeGenCXX/block-in-ctor-dtor.cpp | 2 -
test/CodeGenCXX/global-init.cpp | 3 -
test/CodeGenOpenCL/cl20-device-side-enqueue.cl | 24 +-
test/Sema/alloc-size.c | 23 +
test/SemaCXX/constant-expression-cxx11.cpp | 4 +-
16 files changed, 1078 insertions(+), 206 deletions(-)
create mode 100644 test/CodeGen/alloc-size.c
create mode 100644 test/CodeGenCXX/alloc-size.cpp
create mode 100644 test/Sema/alloc-size.c
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