Tcwg-commits December 2016

tcwg-commits@lists.linaro.org

8 participants
2868 discussions

[llvm] branch master updated (2c96583 -> d22c85d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 2c96583 Revert "In visitSTORE, always use FindBetterChain, rather tha [...] new d22c85d [PPC] Add intrinsics for vector extract word and vector insert word. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/IR/IntrinsicsPowerPC.td | 7 +++++++ lib/Target/PowerPC/PPCInstrVSX.td | 9 +++++++++ test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll | 18 ++++++++++++++++++ 3 files changed, 34 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 11 months

[llvm] branch master updated (615f3cc -> 2c96583)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 615f3cc In visitSTORE, always use FindBetterChain, rather than only w [...] new 2c96583 Revert "In visitSTORE, always use FindBetterChain, rather tha [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 416 ++++++---- lib/CodeGen/TargetLoweringBase.cpp | 2 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 10 + test/CodeGen/AArch64/argument-blocks.ll | 2 +- test/CodeGen/AArch64/arm64-abi.ll | 5 +- test/CodeGen/AArch64/arm64-memset-inline.ll | 4 +- test/CodeGen/AArch64/ldst-opt.ll | 13 +- test/CodeGen/AArch64/merge-store.ll | 5 +- test/CodeGen/AArch64/vector_merge_dep_check.ll | 3 +- test/CodeGen/AMDGPU/debugger-insert-nops.ll | 24 +- test/CodeGen/AMDGPU/insert_vector_elt.ll | 5 +- test/CodeGen/AMDGPU/merge-stores.ll | 17 +- test/CodeGen/AMDGPU/private-element-size.ll | 12 +- test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 17 +- test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll | 3 +- test/CodeGen/ARM/alloc-no-stack-realign.ll | 100 ++- test/CodeGen/ARM/ifcvt10.ll | 2 + test/CodeGen/ARM/memset-inline.ll | 10 +- test/CodeGen/ARM/static-addr-hoisting.ll | 6 +- test/CodeGen/BPF/undef.ll | 65 +- test/CodeGen/MSP430/Inst16mm.ll | 2 +- test/CodeGen/Mips/cconv/arguments-float.ll | 24 +- test/CodeGen/Mips/cconv/arguments-varargs.ll | 44 +- test/CodeGen/Mips/fastcc.ll | 76 +- test/CodeGen/Mips/load-store-left-right.ll | 126 ++- test/CodeGen/Mips/micromips-li.ll | 2 +- test/CodeGen/Mips/mips64-f128.ll | 2 +- test/CodeGen/Mips/mno-ldc1-sdc1.ll | 46 +- test/CodeGen/Mips/msa/f16-llvm-ir.ll | 14 +- test/CodeGen/Mips/msa/i5_ld_st.ll | 32 +- test/CodeGen/Mips/o32_cc_byval.ll | 54 +- test/CodeGen/Mips/o32_cc_vararg.ll | 4 +- test/CodeGen/PowerPC/anon_aggr.ll | 31 +- test/CodeGen/PowerPC/complex-return.ll | 12 +- test/CodeGen/PowerPC/jaggedstructs.ll | 16 +- test/CodeGen/PowerPC/ppc64-align-long-double.ll | 57 +- test/CodeGen/PowerPC/structsinmem.ll | 28 +- test/CodeGen/PowerPC/structsinregs.ll | 60 +- test/CodeGen/SystemZ/unaligned-01.ll | 5 +- test/CodeGen/Thumb/2010-07-15-debugOrdering.ll | 2 +- test/CodeGen/Thumb/stack-access.ll | 8 +- test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll | 2 +- test/CodeGen/X86/2012-11-28-merge-store-alias.ll | 2 +- test/CodeGen/X86/MergeConsecutiveStores.ll | 14 +- test/CodeGen/X86/avx512-mask-op.ll | 4 + test/CodeGen/X86/chain_order.ll | 4 +- .../CodeGen/X86/clear_upper_vector_element_bits.ll | 56 +- test/CodeGen/X86/combiner-aa-0.ll | 20 + test/CodeGen/X86/combiner-aa-1.ll | 23 + test/CodeGen/X86/copy-eflags.ll | 17 +- test/CodeGen/X86/dag-merge-fast-accesses.ll | 12 +- .../X86/dont-trunc-store-double-to-float.ll | 6 +- .../extractelement-legalization-store-ordering.ll | 8 +- test/CodeGen/X86/i256-add.ll | 8 +- test/CodeGen/X86/i386-shrink-wrapping.ll | 5 +- test/CodeGen/X86/live-range-nosubreg.ll | 5 +- test/CodeGen/X86/merge-consecutive-loads-128.ll | 20 +- test/CodeGen/X86/merge-consecutive-loads-256.ll | 8 +- .../X86/merge-store-partially-alias-loads.ll | 8 +- test/CodeGen/X86/pr18023.ll | 31 + test/CodeGen/X86/split-store.ll | 20 +- test/CodeGen/X86/stores-merging.ll | 11 +- test/CodeGen/X86/vector-compare-results.ll | 730 ++++++++--------- test/CodeGen/X86/vector-shuffle-variable-128.ll | 906 ++++++++++++--------- test/CodeGen/X86/vector-shuffle-variable-256.ll | 232 +++--- test/CodeGen/X86/win32-eh.ll | 157 ++-- test/CodeGen/XCore/varargs.ll | 2 +- 67 files changed, 1995 insertions(+), 1682 deletions(-) create mode 100644 test/CodeGen/X86/combiner-aa-0.ll create mode 100644 test/CodeGen/X86/combiner-aa-1.ll create mode 100644 test/CodeGen/X86/pr18023.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 11 months

[clang] branch master updated (153c995 -> 3a67a19)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 153c995 Document and publish the useful module-file-info flag. new 3a67a19 Store decls in prototypes on the declarator instead of in the AST The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/clang/AST/Decl.h | 10 ---- include/clang/Sema/DeclSpec.h | 40 +++++++++++-- include/clang/Sema/Sema.h | 6 -- lib/AST/ASTDumper.cpp | 5 -- lib/AST/Decl.cpp | 22 ------- lib/Parse/ParseDecl.cpp | 16 +++++ lib/Parse/ParseExpr.cpp | 1 + lib/Parse/ParseExprCXX.cpp | 2 + lib/Sema/DeclSpec.cpp | 17 +++++- lib/Sema/SemaDecl.cpp | 85 +++++++++++++-------------- lib/Sema/SemaTemplateVariadic.cpp | 2 +- lib/Sema/SemaType.cpp | 3 +- test/Misc/ast-dump-decl.c | 10 +++- test/PCH/decl-in-prototype.c | 27 +++++++++ test/Sema/decl-in-prototype.c | 18 +++++- test/SemaCXX/type-definition-in-specifier.cpp | 21 ++++--- 16 files changed, 176 insertions(+), 109 deletions(-) create mode 100644 test/PCH/decl-in-prototype.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 11 months

[lld] branch master updated (60f7e32 -> f4830b0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from 60f7e32 Don't crash on an extra symbol in a version script. new f4830b0 Fix parsing when one extern follows another. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ELF/LinkerScript.cpp | 4 +++- test/ELF/dynamic-list-extern.s | 15 +++++++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) create mode 100644 test/ELF/dynamic-list-extern.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 11 months

[gcc] branch master updated (cc3afa6 -> 94f4da1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from cc3afa6 * gcc.target/powerpc/dimode-1.c: Update syntax on scan-assem [...] new 94f4da1 PR78255: Make postreload aware of NO_FUNCTION_CSE The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 6 ++++ gcc/postreload.c | 5 +++ gcc/testsuite/ChangeLog | 7 ++++ gcc/testsuite/gcc.target/aarch64/pr78255.c | 12 +++++++ gcc/testsuite/gcc.target/arm/pr78255-1.c | 57 ++++++++++++++++++++++++++++++ gcc/testsuite/gcc.target/arm/pr78255-2.c | 12 +++++++ 6 files changed, 99 insertions(+) create mode 100644 gcc/testsuite/gcc.target/aarch64/pr78255.c create mode 100644 gcc/testsuite/gcc.target/arm/pr78255-1.c create mode 100644 gcc/testsuite/gcc.target/arm/pr78255-2.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 11 months

[lldb] branch master updated (02c71a7 -> 7691287)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lldb. from 02c71a7 [LLDB][MIPS] Fix TestWatchpointIter failure new 8a6ba48 Rename multiple target test so it is unique. new 7691287 Fix buildbots that are failing due to this test by adding all [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../test/api/multiple-targets/TestMultipleTargets.py | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 11 months

[gcc] branch master updated (edae406 -> cc3afa6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from edae406 Fix std::variant for gnu-versioned--namespace build new cc3afa6 * gcc.target/powerpc/dimode-1.c: Update syntax on scan-assem [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/ChangeLog | 6 ++++++ gcc/testsuite/gcc.target/powerpc/p9-dimode1.c | 10 +++++----- gcc/testsuite/gcc.target/powerpc/p9-dimode2.c | 8 ++++---- 3 files changed, 15 insertions(+), 9 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 11 months

[llvm] branch master updated (8c44335 -> 615f3cc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 8c44335 Use SelectionDAG.getSplatBuildVector helper. NFCI. new 615f3cc In visitSTORE, always use FindBetterChain, rather than only w [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 416 ++++------ lib/CodeGen/TargetLoweringBase.cpp | 2 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 10 - test/CodeGen/AArch64/argument-blocks.ll | 2 +- test/CodeGen/AArch64/arm64-abi.ll | 5 +- test/CodeGen/AArch64/arm64-memset-inline.ll | 4 +- test/CodeGen/AArch64/ldst-opt.ll | 13 +- test/CodeGen/AArch64/merge-store.ll | 5 +- test/CodeGen/AArch64/vector_merge_dep_check.ll | 3 +- test/CodeGen/AMDGPU/debugger-insert-nops.ll | 24 +- test/CodeGen/AMDGPU/insert_vector_elt.ll | 5 +- test/CodeGen/AMDGPU/merge-stores.ll | 17 +- test/CodeGen/AMDGPU/private-element-size.ll | 12 +- test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 17 +- test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll | 3 +- test/CodeGen/ARM/alloc-no-stack-realign.ll | 100 +-- test/CodeGen/ARM/ifcvt10.ll | 2 - test/CodeGen/ARM/memset-inline.ll | 10 +- test/CodeGen/ARM/static-addr-hoisting.ll | 6 +- test/CodeGen/BPF/undef.ll | 65 +- test/CodeGen/MSP430/Inst16mm.ll | 2 +- test/CodeGen/Mips/cconv/arguments-float.ll | 24 +- test/CodeGen/Mips/cconv/arguments-varargs.ll | 44 +- test/CodeGen/Mips/fastcc.ll | 76 +- test/CodeGen/Mips/load-store-left-right.ll | 126 +-- test/CodeGen/Mips/micromips-li.ll | 2 +- test/CodeGen/Mips/mips64-f128.ll | 2 +- test/CodeGen/Mips/mno-ldc1-sdc1.ll | 46 +- test/CodeGen/Mips/msa/f16-llvm-ir.ll | 14 +- test/CodeGen/Mips/msa/i5_ld_st.ll | 32 +- test/CodeGen/Mips/o32_cc_byval.ll | 54 +- test/CodeGen/Mips/o32_cc_vararg.ll | 4 +- test/CodeGen/PowerPC/anon_aggr.ll | 31 +- test/CodeGen/PowerPC/complex-return.ll | 12 +- test/CodeGen/PowerPC/jaggedstructs.ll | 16 +- test/CodeGen/PowerPC/ppc64-align-long-double.ll | 57 +- test/CodeGen/PowerPC/structsinmem.ll | 28 +- test/CodeGen/PowerPC/structsinregs.ll | 60 +- test/CodeGen/SystemZ/unaligned-01.ll | 5 +- test/CodeGen/Thumb/2010-07-15-debugOrdering.ll | 2 +- test/CodeGen/Thumb/stack-access.ll | 8 +- test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll | 2 +- test/CodeGen/X86/2012-11-28-merge-store-alias.ll | 2 +- test/CodeGen/X86/MergeConsecutiveStores.ll | 14 +- test/CodeGen/X86/avx512-mask-op.ll | 4 - test/CodeGen/X86/chain_order.ll | 4 +- .../CodeGen/X86/clear_upper_vector_element_bits.ll | 56 +- test/CodeGen/X86/combiner-aa-0.ll | 20 - test/CodeGen/X86/combiner-aa-1.ll | 23 - test/CodeGen/X86/copy-eflags.ll | 17 +- test/CodeGen/X86/dag-merge-fast-accesses.ll | 12 +- .../X86/dont-trunc-store-double-to-float.ll | 6 +- .../extractelement-legalization-store-ordering.ll | 8 +- test/CodeGen/X86/i256-add.ll | 8 +- test/CodeGen/X86/i386-shrink-wrapping.ll | 5 +- test/CodeGen/X86/live-range-nosubreg.ll | 5 +- test/CodeGen/X86/merge-consecutive-loads-128.ll | 20 +- test/CodeGen/X86/merge-consecutive-loads-256.ll | 8 +- .../X86/merge-store-partially-alias-loads.ll | 8 +- test/CodeGen/X86/pr18023.ll | 31 - test/CodeGen/X86/split-store.ll | 20 +- test/CodeGen/X86/stores-merging.ll | 11 +- test/CodeGen/X86/vector-compare-results.ll | 730 ++++++++--------- test/CodeGen/X86/vector-shuffle-variable-128.ll | 906 +++++++++------------ test/CodeGen/X86/vector-shuffle-variable-256.ll | 232 +++--- test/CodeGen/X86/win32-eh.ll | 157 ++-- test/CodeGen/XCore/varargs.ll | 2 +- 67 files changed, 1682 insertions(+), 1995 deletions(-) delete mode 100644 test/CodeGen/X86/combiner-aa-0.ll delete mode 100644 test/CodeGen/X86/combiner-aa-1.ll delete mode 100644 test/CodeGen/X86/pr18023.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 11 months

[binutils-gdb] branch master updated (f94f411 -> 1736a7b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from f94f411 Add ChangeLog entries new 1736a7b gdb: Remove support for obsolete OSABIs and a.out The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/ChangeLog | 111 ++++++++++++++++++++++++++ gdb/Makefile.in | 1 - gdb/alpha-fbsd-tdep.c | 2 +- gdb/alpha-nbsd-tdep.c | 22 +----- gdb/alpha-obsd-tdep.c | 2 +- gdb/amd64-fbsd-tdep.c | 2 +- gdb/amd64-nbsd-tdep.c | 2 +- gdb/amd64-obsd-tdep.c | 55 +------------ gdb/arm-nbsd-nat.c | 29 ------- gdb/arm-nbsd-tdep.c | 27 +------ gdb/arm-obsd-tdep.c | 15 +--- gdb/arm-tdep.c | 5 -- gdb/breakpoint.c | 8 -- gdb/configure.tgt | 8 +- gdb/dbxread.c | 201 ++---------------------------------------------- gdb/defs.h | 10 +-- gdb/fbsd-tdep.c | 2 +- gdb/hppa-nbsd-tdep.c | 2 +- gdb/hppa-obsd-tdep.c | 20 +---- gdb/hppa-tdep.c | 23 ------ gdb/i386-bsd-tdep.c | 35 --------- gdb/i386-fbsd-tdep.c | 16 +--- gdb/i386-nbsd-tdep.c | 2 +- gdb/i386-obsd-tdep.c | 71 +---------------- gdb/m68k-bsd-tdep.c | 111 +------------------------- gdb/mips-nbsd-tdep.c | 2 +- gdb/mips64-obsd-tdep.c | 2 +- gdb/osabi.c | 44 ++++------- gdb/ppc-fbsd-tdep.c | 7 +- gdb/ppc-nbsd-tdep.c | 2 +- gdb/ppc-obsd-tdep.c | 22 +----- gdb/rs6000-tdep.c | 3 +- gdb/sh-nbsd-tdep.c | 21 +---- gdb/solib.c | 24 +----- gdb/sparc-nbsd-tdep.c | 58 +------------- gdb/sparc-obsd-tdep.c | 4 +- gdb/sparc-tdep.h | 4 +- gdb/sparc64-fbsd-tdep.c | 2 +- gdb/sparc64-nbsd-tdep.c | 2 +- gdb/sparc64-obsd-tdep.c | 2 +- gdb/stabsread.c | 9 ++- gdb/symmisc.c | 2 +- gdb/vax-nbsd-tdep.c | 2 +- gdb/vax-obsd-tdep.c | 178 ------------------------------------------ 44 files changed, 193 insertions(+), 979 deletions(-) delete mode 100644 gdb/vax-obsd-tdep.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 11 months

[llvm] branch master updated (26486ab -> 8c44335)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 26486ab AMDGPU/SI: Don't mark VINTRP instructions as mayLoad new 8c44335 Use SelectionDAG.getSplatBuildVector helper. NFCI. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 11 months

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Tcwg-commits December 2016