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from c058e72 2016-10-31 Thomas Koenig <tkoenig(a)gcc.gnu.org>
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from 14883de PR target/78166 * config/pa/pa.md: Add new shift/add patter [...]
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from 5ded6eb [RISCV] Add bare-bones RISC-V MCTargetDesc
new a0a6883 [docs] Fix some typos. NFC.
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docs/SourceLevelDebugging.rst | 29 ++++++++++++++---------------
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unknown user pushed a change to branch master
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from af955fe BFD: Fix double BFD_FAIL calls in `bfd_default_reloc_type_lookup'
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unknown user pushed a change to branch binutils-2_27-branch
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from 72d5de4 [RISCV 4/10] Add basic RISCV{InstrFormats,InstrInfo,RegisterI [...]
new 5ded6eb [RISCV] Add bare-bones RISC-V MCTargetDesc
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lib/Target/RISCV/CMakeLists.txt | 2 +
lib/Target/RISCV/LLVMBuild.txt | 2 +-
lib/Target/RISCV/MCTargetDesc/CMakeLists.txt | 7 ++
lib/Target/RISCV/{ => MCTargetDesc}/LLVMBuild.txt | 14 +---
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 91 ++++++++++++++++++++++
.../RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp | 51 ++++++++++++
lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp | 25 ++++++
lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h | 31 ++++++++
.../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 91 ++++++++++++++++++++++
.../RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 59 ++++++++++++++
lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h | 58 ++++++++++++++
lib/Target/RISCV/RISCVTargetMachine.h | 5 +-
lib/Target/RISCV/TargetInfo/RISCVTargetInfo.cpp | 5 --
13 files changed, 421 insertions(+), 20 deletions(-)
create mode 100644 lib/Target/RISCV/MCTargetDesc/CMakeLists.txt
copy lib/Target/RISCV/{ => MCTargetDesc}/LLVMBuild.txt (71%)
create mode 100644 lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
create mode 100644 lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
create mode 100644 lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
create mode 100644 lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
create mode 100644 lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
create mode 100644 lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
create mode 100644 lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
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unknown user pushed a change to branch aoliva/libcp1
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from f364b18 Introduce C++ support in libcc1
new ec9b173 libcp1: ignore namespace decls in address_rewriter
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from ac4d1bb AMDGPU: Handle CopyToReg in getOperandRegClass
new 72d5de4 [RISCV 4/10] Add basic RISCV{InstrFormats,InstrInfo,RegisterI [...]
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lib/Target/RISCV/CMakeLists.txt | 7 ++
lib/Target/RISCV/RISCV.td | 27 ++++++
lib/Target/RISCV/RISCVInstrFormats.td | 152 ++++++++++++++++++++++++++++++++++
lib/Target/RISCV/RISCVInstrInfo.td | 55 ++++++++++++
lib/Target/RISCV/RISCVRegisterInfo.td | 90 ++++++++++++++++++++
5 files changed, 331 insertions(+)
create mode 100644 lib/Target/RISCV/RISCV.td
create mode 100644 lib/Target/RISCV/RISCVInstrFormats.td
create mode 100644 lib/Target/RISCV/RISCVInstrInfo.td
create mode 100644 lib/Target/RISCV/RISCVRegisterInfo.td
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