Tcwg-commits October 2016

tcwg-commits@lists.linaro.org

7 participants
3249 discussions

[libcxx] branch master updated (8be2c5d -> 2b6c249)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository libcxx. from 8be2c5d Add tests for LWG2544. We already implement this; just adding [...] new 2b6c249 Mark issues 2544, 2567, 2569, 2686 and 2694 as ready/done. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: www/upcoming_meeting.html | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[llvm] branch master updated (5d0ca9b -> 155a6ef)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 5d0ca9b Fixed windows stdout/stderr redirection in inline asm constra [...] new 155a6ef [SLPVectorizer][X86] Fixed alignments of scalar loads in sito [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/Transforms/SLPVectorizer/X86/sitofp.ll | 456 ++++++++++++++-------------- test/Transforms/SLPVectorizer/X86/uitofp.ll | 456 ++++++++++++++-------------- 2 files changed, 456 insertions(+), 456 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[clang] branch master updated (4f4e33e -> d1ea6ad)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 4f4e33e [Driver] Make -print-libgcc-file-name print compiler-rt lib w [...] new d1ea6ad Revert r283680. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Driver/ToolChains.cpp | 9 -- lib/Headers/CMakeLists.txt | 1 - lib/Headers/__clang_cuda_complex_builtins.h | 203 ---------------------------- lib/Headers/__clang_cuda_runtime_wrapper.h | 1 - lib/Headers/cuda_wrappers/algorithm | 96 ------------- lib/Headers/cuda_wrappers/complex | 79 ----------- 6 files changed, 389 deletions(-) delete mode 100644 lib/Headers/__clang_cuda_complex_builtins.h delete mode 100644 lib/Headers/cuda_wrappers/algorithm delete mode 100644 lib/Headers/cuda_wrappers/complex -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[libcxx] branch master updated (8a486ce -> 8be2c5d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository libcxx. from 8a486ce [libcxx] Add the missing limits.h header new 8be2c5d Add tests for LWG2544. We already implement this; just adding [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../istreambuf.iterator_equal/equal.pass.cpp | 22 ++++++++++++++++++++++ .../istreambuf.iterator_op!=/not_equal.pass.cpp | 22 ++++++++++++++++++++++ .../istreambuf.iterator_op==/equal.pass.cpp | 22 ++++++++++++++++++++++ 3 files changed, 66 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[gcc] branch master updated (d9b5db8 -> ade2e45)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from d9b5db8 [3/4] ARMv8.2-A testsuite for new vector intrinsics new ade2e45 [4/4] ARMv8.2-A testsuite for new scalar intrinsics The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/ChangeLog | 62 +++++++++ .../aarch64/advsimd-intrinsics/unary_scalar_op.inc | 1 + .../aarch64/advsimd-intrinsics/vabdh_f16_1.c | 44 +++++++ .../aarch64/advsimd-intrinsics/vcageh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcagth_f16_1.c | 21 +++ .../aarch64/advsimd-intrinsics/vcaleh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcalth_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vceqh_f16_1.c | 21 +++ .../aarch64/advsimd-intrinsics/vceqzh_f16_1.c | 21 +++ .../aarch64/advsimd-intrinsics/vcgeh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcgezh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcgth_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcgtzh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcleh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vclezh_f16_1.c | 21 +++ .../aarch64/advsimd-intrinsics/vclth_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcltzh_f16_1.c | 21 +++ .../aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c | 25 ++++ .../aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c | 25 ++++ .../aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c | 25 ++++ .../aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c | 25 ++++ .../aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c | 46 +++++++ .../aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c | 46 +++++++ .../aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c | 46 +++++++ .../aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c | 46 +++++++ .../aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c | 29 +++++ .../aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c | 29 +++++ .../aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c | 29 +++++ .../aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c | 29 +++++ .../aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c | 143 +++++++++++++++++++++ .../aarch64/advsimd-intrinsics/vmaxh_f16_1.c | 34 +++++ .../aarch64/advsimd-intrinsics/vminh_f16_1.c | 34 +++++ .../aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c | 90 +++++++++++++ .../aarch64/advsimd-intrinsics/vmulxh_f16_1.c | 50 +++++++ .../aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c | 91 +++++++++++++ .../aarch64/advsimd-intrinsics/vrecpeh_f16_1.c | 42 ++++++ .../aarch64/advsimd-intrinsics/vrecpsh_f16_1.c | 50 +++++++ .../aarch64/advsimd-intrinsics/vrecpxh_f16_1.c | 32 +++++ .../aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c | 30 +++++ .../aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c | 50 +++++++ 60 files changed, 1916 insertions(+) create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[binutils-gdb] branch master updated (969b385 -> 668df12)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 969b385 MIPS64: Adjust cfi* testcases. new 668df12 bfd/ChangeLog: Add missing PR ld/19908 reference The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 1 + 1 file changed, 1 insertion(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[gcc] branch master updated (348ef3e -> d9b5db8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 348ef3e Define std::allocator<T>::is_always_equal new 6dfe827 [1/4] ARMv8.2-A FP16 testsuite selector new 6778920 [2/4] ARMv8.2-A testsuite for new data movement intrinsics new d9b5db8 [3/4] ARMv8.2-A testsuite for new vector intrinsics The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/ChangeLog | 44 +- .../aarch64/advsimd-intrinsics/arm-neon-ref.h | 16 +- .../aarch64/advsimd-intrinsics/vdiv_f16_1.c | 86 ++ .../aarch64/advsimd-intrinsics/vdup_lane.c | 119 ++- .../aarch64/advsimd-intrinsics/vduph_lane.c | 137 ++++ .../aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c | 908 +++++++++++++++++++++ .../aarch64/advsimd-intrinsics/vfmas_n_f16_1.c | 469 +++++++++++ .../aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c | 131 +++ .../aarch64/advsimd-intrinsics/vmaxv_f16_1.c | 131 +++ .../aarch64/advsimd-intrinsics/vminnmv_f16_1.c | 131 +++ .../aarch64/advsimd-intrinsics/vminv_f16_1.c | 131 +++ .../aarch64/advsimd-intrinsics/vmul_lane_f16_1.c | 454 +++++++++++ .../aarch64/advsimd-intrinsics/vmulx_f16_1.c | 84 ++ .../aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c | 452 ++++++++++ .../aarch64/advsimd-intrinsics/vmulx_n_f16_1.c | 177 ++++ .../aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c | 114 +++ .../aarch64/advsimd-intrinsics/vrndi_f16_1.c | 71 ++ .../aarch64/advsimd-intrinsics/vsqrt_f16_1.c | 72 ++ .../aarch64/advsimd-intrinsics/vtrn_half.c | 263 ++++++ .../aarch64/advsimd-intrinsics/vuzp_half.c | 259 ++++++ .../aarch64/advsimd-intrinsics/vzip_half.c | 263 ++++++ gcc/testsuite/lib/target-supports.exp | 50 +- 22 files changed, 4534 insertions(+), 28 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[binutils-gdb] branch binutils-2_27-branch updated (430e533 -> fc7afe8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch binutils-2_27-branch in repository binutils-gdb. from 430e533 Automatic date update in version.in new fc7afe8 [ARM] PR ld/20608 Relocation truncated to fit: R_ARM_THM_JUMP [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 8 ++++ bfd/elf32-arm.c | 47 +++++++++++++++++++--- ld/ChangeLog | 12 ++++++ ld/testsuite/ld-arm/arm-elf.exp | 6 +++ .../{farcall-mixed-app.d => farcall-mixed-app2.d} | 25 ++++++++---- .../{farcall-mixed-app.r => farcall-mixed-app2.r} | 0 .../{farcall-mixed-app.s => farcall-mixed-app2.s} | 15 +++++++ .../{mixed-app.sym => farcall-mixed-app2.sym} | 2 +- 8 files changed, 101 insertions(+), 14 deletions(-) copy ld/testsuite/ld-arm/{farcall-mixed-app.d => farcall-mixed-app2.d} (81%) copy ld/testsuite/ld-arm/{farcall-mixed-app.r => farcall-mixed-app2.r} (100%) copy ld/testsuite/ld-arm/{farcall-mixed-app.s => farcall-mixed-app2.s} (77%) copy ld/testsuite/ld-arm/{mixed-app.sym => farcall-mixed-app2.sym} (92%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[clang] branch master updated (79a4de8 -> 4f4e33e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 79a4de8 Revert "[x86][inline-asm][clang] accept 'v' constraint" new 4f4e33e [Driver] Make -print-libgcc-file-name print compiler-rt lib w [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: docs/CommandGuide/clang.rst | 3 ++- include/clang/Driver/Options.td | 3 ++- lib/Driver/Driver.cpp | 10 +++++++++- test/Driver/montavista-gcc-toolchain.c | 2 +- test/Driver/print-libgcc-file-name-clangrt.c | 11 +++++++++++ test/Driver/print-libgcc-file-name-libgcc.c | 7 +++++++ test/lit.cfg | 5 +++++ 7 files changed, 37 insertions(+), 4 deletions(-) create mode 100644 test/Driver/print-libgcc-file-name-clangrt.c create mode 100644 test/Driver/print-libgcc-file-name-libgcc.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[gcc] branch master updated (49ecfd7 -> 348ef3e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 49ecfd7 Add noexcept to enable_shared_from_this::weak_from_this new 5d6f9ce PR target/77738 * config/ia64/ia64.md ("doloop_end"): Reject [...] new 66f7f44 LWG 2733, LWG 2759 reject bool in gcd and lcm new 348ef3e Define std::allocator<T>::is_always_equal The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 18 ++++++++---- gcc/config/ia64/ia64.md | 3 ++ libstdc++-v3/ChangeLog | 12 ++++++++ libstdc++-v3/include/bits/allocator.h | 6 +++- libstdc++-v3/include/experimental/numeric | 12 +++++--- libstdc++-v3/include/std/numeric | 14 ++++++--- .../20_util/allocator/requirements/typedefs.cc | 3 ++ .../typedefs.cc => 26_numerics/gcd/gcd_neg.cc} | 33 +++++++++++++--------- .../typedefs.cc => 26_numerics/lcm/lcm_neg.cc} | 33 +++++++++++++--------- libstdc++-v3/testsuite/util/testsuite_allocator.h | 1 + 10 files changed, 94 insertions(+), 41 deletions(-) copy libstdc++-v3/testsuite/{20_util/has_unique_object_representations/requirement [...] copy libstdc++-v3/testsuite/{20_util/has_unique_object_representations/requirement [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits October 2016