Tcwg-commits October 2016

tcwg-commits@lists.linaro.org

7 participants
3249 discussions

[toolchain/spec2xxx-utils] branch master updated (5fa9ea9 -> 7a7ab93)

by Maxim Kuvyrkov

This is an automated email from the git hooks/post-receive script. Maxim Kuvyrkov pushed a change to branch master in repository toolchain/spec2xxx-utils. from 5fa9ea9 Add support for armv8l. new 7cf4afd Handle directories in results/ new 16c839e Fix warning in spec2xxx-config new 7a7ab93 Stash binaries for perf investigations The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: cpu2006.cfg | 2 +- spec2xxx-config | 2 +- spec2xxx-result | 7 ++++++- 3 files changed, 8 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[llvm] branch master updated (a9c6165 -> 4475acb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from a9c6165 AMDGPU/SI: Don't allow unaligned scratch access new 4475acb Add a pass to optimize patterns of vectorized interleaved mem [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/InterleavedAccessPass.cpp | 5 + lib/Target/X86/CMakeLists.txt | 1 + lib/Target/X86/X86ISelLowering.h | 8 ++ lib/Target/X86/X86InterleavedAccess.cpp | 117 +++++++++++++++++++ lib/Target/X86/X86TargetMachine.cpp | 3 + test/CodeGen/X86/x86-interleaved-access.ll | 129 +++++++++++++++++++++ .../X86/interleaved-accesses-64bits-avx.ll | 105 +++++++++++++++++ .../InterleavedAccess}/X86/lit.local.cfg | 0 8 files changed, 368 insertions(+) create mode 100644 lib/Target/X86/X86InterleavedAccess.cpp create mode 100644 test/CodeGen/X86/x86-interleaved-access.ll create mode 100644 test/Transforms/InterleavedAccess/X86/interleaved-accesses-64bi [...] copy test/{LTO/Resolution => Transforms/InterleavedAccess}/X86/lit.local.cfg (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[clang] branch master updated (e1cf700 -> 8cddf5a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from e1cf700 Link static PIE programs against rcrt0.o on OpenBSD new 8cddf5a Revert r284256 due to test failure The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Driver/Tools.cpp | 4 ---- test/Driver/openbsd.c | 23 ----------------------- 2 files changed, 27 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[compiler-rt] branch master updated (d9e6c73 -> 8c1bb14)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository compiler-rt. from d9e6c73 [compiler-rt][XRay] Support tail call sleds new 8c1bb14 [sanitizers] -Wno-macro-redefined for libc++ build The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[toolchain/abe] branch master updated (5c65b85 -> 8aa8e79)

by Ryan Arnold

This is an automated email from the git hooks/post-receive script. Ryan Arnold pushed a change to branch master in repository toolchain/abe. from 5c65b85 Add *_md5sum field to manifests. (bug 1986) new 8aa8e79 Report 'network error' as an error, rather than a warning. Bu [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/make.sh | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[llvm] branch master updated (4869102 -> a9c6165)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 4869102 [RDF] Switch RegisterRef to be a pair (Register, LaneMask) new a9c6165 AMDGPU/SI: Don't allow unaligned scratch access The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/AMDGPU.td | 6 ++++ lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 1 + lib/Target/AMDGPU/AMDGPUSubtarget.h | 5 +++ lib/Target/AMDGPU/SIISelLowering.cpp | 9 ++++++ test/CodeGen/AMDGPU/flat-address-space.ll | 36 ++++++++++++++++++---- .../AMDGPU/adjust-alloca-alignment.ll | 2 +- .../AMDGPU/merge-stores-private.ll | 22 +++++++------ 7 files changed, 64 insertions(+), 17 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[glibc] branch release/2.22/master updated (e07eca6 -> 264856c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch release/2.22/master in repository glibc. from e07eca6 nptl/tst-once5: Reduce time to expected failure new 5976a49 Fixed x86_64 vector sincos/sincosf ABI. new 264856c Don't compile do_test with -mavx/-mavx2/-mavx512. The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 102 +++++++ sysdeps/x86/fpu/test-math-vector-sincos.h | 98 ++++++ sysdeps/x86_64/fpu/Makefile | 61 ++++ .../fpu/multiarch/svml_d_sincos2_core_sse4.S | 56 +++- .../fpu/multiarch/svml_d_sincos4_core_avx2.S | 98 +++++- .../fpu/multiarch/svml_d_sincos8_core_avx512.S | 180 ++++++++++- .../fpu/multiarch/svml_s_sincosf16_core_avx512.S | 310 ++++++++++++++++++- .../fpu/multiarch/svml_s_sincosf4_core_sse4.S | 80 ++++- .../fpu/multiarch/svml_s_sincosf8_core_avx2.S | 152 +++++++++- sysdeps/x86_64/fpu/svml_d_sincos2_core.S | 83 ++++- sysdeps/x86_64/fpu/svml_d_sincos4_core.S | 125 +++++++- sysdeps/x86_64/fpu/svml_d_sincos4_core_avx.S | 120 +++++++- sysdeps/x86_64/fpu/svml_d_sincos8_core.S | 201 ++++++++++++- sysdeps/x86_64/fpu/svml_s_sincosf16_core.S | 335 ++++++++++++++++++++- sysdeps/x86_64/fpu/svml_s_sincosf4_core.S | 126 +++++++- sysdeps/x86_64/fpu/svml_s_sincosf8_core.S | 173 ++++++++++- sysdeps/x86_64/fpu/svml_s_sincosf8_core_avx.S | 179 ++++++++++- .../fpu/test-double-libmvec-sincos-avx-main.c | 1 + .../x86_64/fpu/test-double-libmvec-sincos-avx.c | 1 + .../fpu/test-double-libmvec-sincos-avx2-main.c | 1 + .../x86_64/fpu/test-double-libmvec-sincos-avx2.c | 1 + .../fpu/test-double-libmvec-sincos-avx512-main.c | 1 + .../x86_64/fpu/test-double-libmvec-sincos-avx512.c | 1 + ...f4_core.S => test-double-libmvec-sincos-main.c} | 35 ++- ...incosf4_core.S => test-double-libmvec-sincos.c} | 37 ++- sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c | 6 +- .../x86_64/fpu/test-double-vlen4-avx2-wrappers.c | 10 +- sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c | 10 +- sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c | 10 +- .../fpu/test-float-libmvec-sincosf-avx-main.c | 1 + .../x86_64/fpu/test-float-libmvec-sincosf-avx.c | 1 + .../fpu/test-float-libmvec-sincosf-avx2-main.c | 1 + .../x86_64/fpu/test-float-libmvec-sincosf-avx2.c | 1 + .../fpu/test-float-libmvec-sincosf-avx512-main.c | 1 + .../x86_64/fpu/test-float-libmvec-sincosf-avx512.c | 1 + ...f4_core.S => test-float-libmvec-sincosf-main.c} | 34 ++- ...incosf4_core.S => test-float-libmvec-sincosf.c} | 37 ++- sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c | 10 +- sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c | 10 +- .../x86_64/fpu/test-float-vlen8-avx2-wrappers.c | 13 +- sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c | 10 +- 41 files changed, 2636 insertions(+), 77 deletions(-) create mode 100644 sysdeps/x86/fpu/test-math-vector-sincos.h create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx-main.c create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx.c create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx2-main.c create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx2.c create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx512-main.c create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx512.c copy sysdeps/x86_64/fpu/{svml_s_sincosf4_core.S => test-double-libmvec-sincos-main [...] copy sysdeps/x86_64/fpu/{svml_s_sincosf4_core.S => test-double-libmvec-sincos.c} (62%) create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx-main.c create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx.c create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx2-main.c create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx2.c create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx512-main.c create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx512.c copy sysdeps/x86_64/fpu/{svml_s_sincosf4_core.S => test-float-libmvec-sincosf-main [...] copy sysdeps/x86_64/fpu/{svml_s_sincosf4_core.S => test-float-libmvec-sincosf.c} (62%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[toolchain/abe] branch master updated (9c61d0a -> 5c65b85)

by Ryan Arnold

This is an automated email from the git hooks/post-receive script. Ryan Arnold pushed a change to branch master in repository toolchain/abe. from 9c61d0a Validate manifests after build. new 5c65b85 Add *_md5sum field to manifests. (bug 1986) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/component.sh | 32 ++++++++++++++++++++++++++++++++ lib/fetch.sh | 33 ++++++++++++++++++++++++++++----- lib/globals.sh | 18 ++++++++++++------ lib/package.sh | 5 +++++ testsuite/test.sh | 23 +++++++++++++++++++++++ 5 files changed, 100 insertions(+), 11 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[llvm] branch master updated (a79c08f -> 4869102)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from a79c08f Revert "In preparation for removing getNameWithPrefix off of [...] new a7945e6 [safestack] Use non-thread-local unsafe stack pointer for Contiki OS new 4869102 [RDF] Switch RegisterRef to be a pair (Register, LaneMask) The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/Target/TargetLowering.h | 8 +- lib/CodeGen/SafeStack.cpp | 50 +----- lib/CodeGen/TargetLoweringBase.cpp | 34 ++++- lib/Target/Hexagon/HexagonOptAddrMode.cpp | 8 +- lib/Target/Hexagon/HexagonRDFOpt.cpp | 20 +-- lib/Target/Hexagon/RDFCopy.cpp | 65 ++++---- lib/Target/Hexagon/RDFCopy.h | 1 + lib/Target/Hexagon/RDFGraph.cpp | 245 +++++++++++++----------------- lib/Target/Hexagon/RDFGraph.h | 106 ++++++++----- lib/Target/Hexagon/RDFLiveness.cpp | 41 +++-- lib/Target/Hexagon/RDFLiveness.h | 5 +- lib/Target/X86/X86ISelLowering.cpp | 3 + test/Transforms/SafeStack/X86/array.ll | 3 +- 13 files changed, 280 insertions(+), 309 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

[clang] branch master updated (eeed5f6 -> e1cf700)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from eeed5f6 Implement __stosb intrinsic as a volatile memset new e1cf700 Link static PIE programs against rcrt0.o on OpenBSD The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Driver/Tools.cpp | 4 ++++ test/Driver/openbsd.c | 23 +++++++++++++++++++++++ 2 files changed, 27 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

8 years, 1 month

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Tcwg-commits October 2016