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from e4d0660 Fix whitespace in my MAINTAINERS change commit.
new 1fe39f9 Define DBX_REGISTER_NUMBER for IA MCU
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Summary of changes:
gcc/ChangeLog | 7 +++++++
gcc/config/i386/iamcu.h | 11 +++++++++++
2 files changed, 18 insertions(+)
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commit fa22ae07d217b50d2bf045b0a180db698a53a600
Author: H.J. Lu <hjl.tools(a)gmail.com>
Date: Wed Jul 29 14:01:06 2015 -0700
Define DBX_REGISTER_NUMBER for IA MCU
Since IA MCU uses the same debug register map as Linux/x86, we copy
DBX_REGISTER_NUMBER together with TARGET_ASM_FILE_START_FILE_DIRECTIVE
and ASM_COMMENT_START from i386/gnu-user.h to i386/iamcu.h.
* config/i386/iamcu.h (TARGET_ASM_FILE_START_FILE_DIRECTIVE):
New. Copied from config/i386/gnu-user.h.
(ASM_COMMENT_START): Likewise.
(DBX_REGISTER_NUMBER): Likewise.
---
gcc/config/i386/iamcu.h | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/gcc/config/i386/iamcu.h b/gcc/config/i386/iamcu.h
index 1e2fbe4..c20c2db 100644
--- a/gcc/config/i386/iamcu.h
+++ b/gcc/config/i386/iamcu.h
@@ -26,6 +26,17 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#undef TARGET_SUBTARGET_DEFAULT
#define TARGET_SUBTARGET_DEFAULT MASK_IAMCU
+/* Output at beginning of assembler file. */
+/* The .file command should always begin the output. */
+#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
+
+#undef ASM_COMMENT_START
+#define ASM_COMMENT_START "#"
+
+#undef DBX_REGISTER_NUMBER
+#define DBX_REGISTER_NUMBER(n) \
+ (TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n])
+
#undef ASM_SPEC
#define ASM_SPEC "--32 -march=iamcu"
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unknown user pushed a commit to branch hjl/iamcu/improve
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commit 3acea277b3824d983e542efab6f0715854276075
Author: H.J. Lu <hjl.tools(a)gmail.com>
Date: Wed Jul 8 19:46:43 2015 -0700
IA MCU run-time doesn't support TLS
Return 0 in check_effective_target_tls_native and
check_effective_target_tls_emulated for IA MCU target.
---
gcc/testsuite/lib/target-supports.exp | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 1988301..c97fa08 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -701,8 +701,9 @@ proc check_effective_target_tls {} {
proc check_effective_target_tls_native {} {
# VxWorks uses emulated TLS machinery, but with non-standard helper
- # functions, so we fail to automatically detect it.
- if { [istarget *-*-vxworks*] } {
+ # functions, so we fail to automatically detect it. IA MCU run-time
+ # doesn't support TLS.
+ if { [istarget *-*-vxworks*] || [istarget *-*-elfiamcu] } {
return 0
}
@@ -716,6 +717,11 @@ proc check_effective_target_tls_native {} {
# Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
proc check_effective_target_tls_emulated {} {
+ # IA MCU run-time doesn't support TLS.
+ if { [istarget *-*-elfiamcu] } {
+ return 0
+ }
+
# VxWorks uses emulated TLS machinery, but with non-standard helper
# functions, so we fail to automatically detect it.
if { [istarget *-*-vxworks*] } {
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commit 55bceed6a022d992a9e760853e61651d839e240b
Author: H.J. Lu <hjl.tools(a)gmail.com>
Date: Thu Jul 9 18:42:45 2015 -0700
Turn off X86_TUNE_ZERO_EXTEND_WITH_AND for IA MCU
---
gcc/config/i386/x86-tune.def | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def
index 42a560b..eb271b8 100644
--- a/gcc/config/i386/x86-tune.def
+++ b/gcc/config/i386/x86-tune.def
@@ -448,7 +448,7 @@ DEF_TUNE (X86_TUNE_SHIFT1, "shift1", ~m_486)
/* X86_TUNE_ZERO_EXTEND_WITH_AND: Use AND instruction instead
of mozbl/movwl. */
DEF_TUNE (X86_TUNE_ZERO_EXTEND_WITH_AND, "zero_extend_with_and",
- m_486 | m_PENT | m_IAMCU)
+ m_486 | m_PENT)
/* X86_TUNE_PROMOTE_HIMODE_IMUL: Modern CPUs have same latency for HImode
and SImode multiply, but 386 and 486 do HImode multiply faster. */
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