Tcwg-commits July 2015

tcwg-commits@lists.linaro.org

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1355 discussions

[gcc] branch trunk updated (d66793e -> cbcdee0)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch trunk in repository gcc. from d66793e 2015-07-09 Michael Meissner <meissner(a)linux.vnet. [...] new cbcdee0 Adjust variable shift costs for IA MCU The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 5 +++++ gcc/config/i386/i386.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] branch trunk updated (46d356e -> d66793e)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch trunk in repository gcc. from 46d356e * pt.c (instantiation_dependent_r) [TRAIT_EXPR]: Call value_dependent_expression_p. new 8b2f725 2015-07-09 Michael Meissner <meissner(a)linux.vnet.ibm.com> new d66793e 2015-07-09 Michael Meissner <meissner(a)linux.vnet.ibm.com> The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 58 +++++++++++++++++ gcc/config/rs6000/rs6000-protos.h | 3 +- gcc/config/rs6000/rs6000.c | 131 +++++++++++++++++++++++--------------- gcc/config/rs6000/rs6000.h | 39 ++++++++++-- 4 files changed, 171 insertions(+), 60 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] branch master updated (46d356e -> d66793e)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 46d356e * pt.c (instantiation_dependent_r) [TRAIT_EXPR]: Call value_dependent_expression_p. new 8b2f725 2015-07-09 Michael Meissner <meissner(a)linux.vnet.ibm.com> new d66793e 2015-07-09 Michael Meissner <meissner(a)linux.vnet.ibm.com> The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 58 +++++++++++++++++ gcc/config/rs6000/rs6000-protos.h | 3 +- gcc/config/rs6000/rs6000.c | 131 +++++++++++++++++++++++--------------- gcc/config/rs6000/rs6000.h | 39 ++++++++++-- 4 files changed, 171 insertions(+), 60 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] branch trunk updated (853a01d -> 46d356e)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch trunk in repository gcc. from 853a01d 2015-07-09 Vladimir Makarov <vmakarov(a)redhat.com> new b8510b8 * parser.c (cp_parser_default_type_template_argument) (cp_parser_default_template_template_argument): Factor out from cp_parser_type_parameter. new bbd9557 * cp-tree.h (struct cp_parameter_declarator): Rename ellipsis_p to template_parameter_pack_p. * parser.c (declarator_can_be_parameter_pack): False if parameter_pack_p is set. (make_parameter_declarator): Add template_parameter_pack_p parm. (cp_parser_template_parameter): Remove parameter pack parsing. (cp_parser_parameter_declaration): Handle all parameter packs. Tweak default argument permerror. new 46d356e * pt.c (instantiation_dependent_r) [TRAIT_EXPR]: Call value_dependent_expression_p. The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/cp/ChangeLog | 20 ++++++ gcc/cp/cp-tree.h | 5 +- gcc/cp/parser.c | 214 +++++++++++++++++++++++++------------------------------ gcc/cp/pt.c | 6 +- 4 files changed, 121 insertions(+), 124 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] branch master updated (853a01d -> 46d356e)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 853a01d 2015-07-09 Vladimir Makarov <vmakarov(a)redhat.com> new b8510b8 * parser.c (cp_parser_default_type_template_argument) (cp_parser_default_template_template_argument): Factor out from cp_parser_type_parameter. new bbd9557 * cp-tree.h (struct cp_parameter_declarator): Rename ellipsis_p to template_parameter_pack_p. * parser.c (declarator_can_be_parameter_pack): False if parameter_pack_p is set. (make_parameter_declarator): Add template_parameter_pack_p parm. (cp_parser_template_parameter): Remove parameter pack parsing. (cp_parser_parameter_declaration): Handle all parameter packs. Tweak default argument permerror. new 46d356e * pt.c (instantiation_dependent_r) [TRAIT_EXPR]: Call value_dependent_expression_p. The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/cp/ChangeLog | 20 ++++++ gcc/cp/cp-tree.h | 5 +- gcc/cp/parser.c | 214 +++++++++++++++++++++++++------------------------------ gcc/cp/pt.c | 6 +- 4 files changed, 121 insertions(+), 124 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] branch hjl/tune/cost-sched updated (5c061fb -> 74060e1)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch hjl/tune/cost-sched in repository gcc. discards 5c061fb Add -mcost= and -mschedule= options to x86 backend adds 67f4304 2015-07-03 Ville Voutilainen <ville.voutilainen(a)gmail.com> adds b58783c * doc/xml/manual/status_cxx2017.xml: Update status table. * doc/html/manual/*: Regenerate. adds c9137c8 PR rtl-optimization/66706 * gcc.target/powerpc/shift-int.c: New testcase. adds 1e31738 * gcc.dg/plugin/wide-int_plugin.c (test_double_int_round_udiv): Avoid narrowing error. adds 55a0118 [Patch docs obvious AArch64] Fix position of -moverride documentation adds 3cd8a8a 2015-07-03 Carlos Sánchez de La Lama <csanchezdll(a)gmail.com> adds 2a6eea5 2015-07-03 Paolo Carlini <paolo.carlini(a)oracle.com> adds 48fc4cf Daily bump. adds d0e616a 2015-07-04 Marc Glisse <marc.glisse(a)inria.fr> adds 7506bd9 PR target/66114 * config/pa/pa.md (indirect_jump): Use pmode_register_operand instead of register_operand. Remove constraint. adds a5baeed 2015-07-04 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 874cca8 2015-07-04 Bernd Edlinger <bernd.edlinger(a)hotmail.de> adds 90b6ad4 Daily bump. adds 31300ec 2015-07-04 Sandra Loosemore <sandra(a)codesourcery.com> adds 9a1bd12 gcc/ * target.def: Add code_for_* hooks. * gentarget-def.c (def_target_insn): Add TARGET_CODE_FOR_* macros. * defaults.h (HAVE_tablejump, gen_tablejump): Delete. * target-insns.def (casesi, tablejump): New targetm instruction patterns. * expr.c (try_casesi): Use them instead of HAVE_*/gen_* interface. (do_tablejump): Likewise. * stmt.c (expand_switch_as_decision_tree_p): Likewise. (expand_sjlj_dispatch_table): Likewise. * targhooks.c (default_case_values_th [...] adds a3c81e6 gcc/ * target-insns.def (builtin_longjmp, builtin_setjmp_receiver) (builtin_setjmp_setup, exception_receiver, nonlocal_goto) (nonlocal_goto_receiver): New targetm instruction patterns. * builtins.c (expand_builtin_setjmp_setup): Use them instead of HAVE_*/gen_* interface. (expand_builtin_setjmp_receiver): Likewise. (expand_builtin_longjmp, expand_builtin_nonlocal_goto): Likewise. * except.c (expand_dw2_landing_pad_for_region): Likewise. adds 1d99ab0 gcc/ * target-insns.def (untyped_call, untyped_return): New targetm instruction patterns. * builtins.c (expand_builtin_apply): Use them instead of HAVE_*/gen_* interface. (result_vector): Define unconditionally. adds 1d375a7 gcc/ * target-insns.def (prefetch): New targetm instruction pattern. * tree-ssa-loop-prefetch.c: Include targeth. (tree_ssa_prefetch_arrays): Use prefetch targetm pattern instead of HAVE_*/gen_* interface. * builtins.c (expand_builtin_prefetch): Likewise. * toplev.c (process_options): Likewise. adds 4db8dd0 gcc/ * target-insns.def (trap): New targetm instruction pattern. * builtins.c (expand_builtin_trap): Use it instead of HAVE_*/gen_* interface. * explow.c (allocate_dynamic_stack_space): Likewise. * ifcvt.c (find_if_header): Likewise. adds 71512c0 gcc/ * target-insns.def (restore_stack_block, restore_stack_function) (restore_stack_nonlocal, save_stack_block, save_stack_function) (save_stack_nonlocal): New targetm instruction patterns. * builtins.c (expand_builtin_apply): Use them instead of HAVE_*/gen_* interface. * explow.c (emit_stack_save, emit_stack_restore): Likewise. adds ec19b61 gcc/ * expr.h (gen_move_insn_uncast): Delete. * expr.c (gen_move_insn_uncast): Delete. adds e9b0644 gcc/ * target-insns.def (stack_protect_set, stack_protect_test): New targetm instruction patterns. * cfgexpand.c (stack_protect_prologue): Use them instead of HAVE_*/gen_* interface. * function.c (stack_protect_epilogue): Likewise. adds a558802 gcc/ * target-insns.def (allocate_stack, check_stack, probe_stack) (probe_stack_address, split_stack_prologue, split_stack_space_check): New targetm instruction patterns. * explow.c (allocate_dynamic_stack_space): Use them instead of HAVE_*/gen_* interface. (emit_stack_probe): Likewise. (probe_stack_range): Likewise. * function.c (thread_prologue_and_epilogue_insns): Likewise. adds 32e17df gcc/ * target-insns.def (clear_cache): New targetm instruction pattern. * builtins.c (expand_builtin___clear_cache): Use it instead of HAVE_*/gen_* interface. adds 4177c69 gcc/ * target-insns.def (doloop_begin, doloop_end): New targetm instruction patterns. * loop-init.c: Include target.h. (pass_loop2::gate): Use the new targetm patterns instead of HAVE_*/gen_* interface. (pass_rtl_doloop::gate): Likewise. (pass_rtl_doloop::execute): Remove preprocessor condition. * hw-doloop.c: Build unconditionally. * loop-doloop.c: Likewise. (doloop_optimize): Use the new targetm patterns instead of HAVE_*/gen_* interface. (doloop_modify [...] adds 451e3cf gcc/ * target-insns.def (extv, extzv, insv): New targetm instruction patterns. * optabs.c (get_extraction_insn): Use them instead of HAVE_*/gen_* interface. * recog.c (simplify_while_replacing): Likewise. adds 86d0644 PR tree-optimization/66718 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_store, vectorizable_load, vectorizable_condition): Move vectype, nunits, ncopies computation after checking what kind of statement stmt is. adds 05e5154 PR tree-optimization/66718 * tree-vect-stmts.c (vectorizable_call): Replace uses of GOMP_SIMD_LANE outside of loop with vf - 1 rather than 0. adds 0446c24 * doc/fragments.texi (Target Fragment): Convert debian.org link to use https. * doc/install.texi (Configuration): Ditto. adds e2c4a09 2015-07-05 François Dumont <fdumont(a)gcc.gnu.org> adds 5c3c230 2015-07-05 Chung-Lin Tang <cltang(a)codesourcery.com> Sandra Loosemore <sandra(a)codesourcery.com> adds a7081fa Daily bump. adds 6145350 PR tree-optimization/66720 * gcc.dg/vect/pr48052.c: Use dg-require-effective-target vect_int_mult. adds a29fd1b libgomp: Add comment to clarify last_team usage adds e3c1971 PR libfortran/40267 * Makefile.am: Remove libgfortranbegin targets. * Makefile.in: Regenerate. * fmain.c: Remove. adds 535b528 PR tree-optimization/66757 * match.pd: Add missing condition to ~X ^ C -> X ^ ~C. adds 1caa6ab gcc/testsuite/ChangeLog: adds 7832d94 Added missing Changelog entry for testsuite. adds e7966fe 2015-07-06 Richard Biener <rguenther(a)suse.de> adds 282b12f [AArch64] PR target/66731 Fix fnmul insn with -frounding-math adds 8697277 Rename read-md.c:decimal_string adds 9a56363 Allow -mincoming-stack-boundary=3 with -mno-sse adds b127ad6 Fix assert caused by bad cfg manipulation in bfin. adds 80b8a97 2015-07-06 Richard Biener <rguenther(a)suse.de> adds a21bc0f MIPS: For micromips allow the near-far-3.c test to use the jals instruction to call near_func. adds 83c6000 2015-07-06 Richard Biener <rguenther(a)suse.de> adds 9e9379b Add -march=iamcu to optimize for IA MCU adds 4f0e25c [ARM] fix movdi expander to avoid illegal ldrd/strd adds ffe67be 2015-07-06 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 82cbe1b * config/i386/i386.md (extv<mode>): Rename from extv. Use SWI24 modes for operands 0 and 1. Use SImode for operands 2 and 3. Copy operand 1 to a temporary if !ext_register_operand. Remove ancient extract_bit_field workaround. (*extv<mode>): Rename from *mov<mode>_extv_1. (*extvqi): Rename from *movqi_extv_q. (extzv<mode>): Rename from extzv. Use SWI248 modes for operands 0 and 1. Use SImode for operands 2 and 3. Copy operand 1 to a temporary if !ext_reg [...] adds 01872b8 Optimize i?86-*-elfiamcu for iamcu by default adds 381fe25 [ARM] PR/65956 AAPCS update for alignment attribute adds 44121e9 Fix eipa_src AAPCS issue (PR target/65956) adds 668de2f 2015-07-06 Steve Ellcey <sellcey(a)imgtec.com> adds 3c537ec Handle PROCESSOR_IAMCU in ix86_target_macros_internal adds c8047e0 2015-07-06 Marc Glisse <marc.glisse(a)inria.fr> adds 40bdfbc gcc/ * graphite-blocking.c (HAVE_isl): Include <stddef.h>. * graphite-dependencies.c, graphite-interchange.c, graphite-isl-ast-to-gimple.c, graphite-optimize-isl.c, graphite-poly.c, graphite-scop-detection.c, graphite-sese-to-poly.c, graphite.c: Likewise. adds bd10f27 * s-oscons-tmplt.c: Add support for DragonFly alongside FreeBSD. adds 67842e8 * config/nvptx/nvptx.c (nvptx_reorg): Remove unused vars. Fix call to nvptx_reorg_subreg. adds 9d93412 * config/i386/i386.md (insv<mode>): Rename from insv. Use SWI48 modes for operands 0 and 3. Use SImode for operands 2 and 3. Copy operand 0 to a temporary if !ext_register_operand. Remove ancient extract_bit_field workaround. (insv<mode>_1): Rename from mov<mode>_insv_1. (*insvqi): Rename from *movqi_insv_2. * config/i386/i386.c (emit_i386_cw_initialization): Update calls for renamed insvsi_1. (promote_duplicated_reg): Ditto for renamed insv<mode>_1. adds 2e7845f * pt.c (argument_pack_element_is_expansion_p): A decl pack is an expansion. adds 1cc00a0 * pt.c (reduce_template_parm_level): Also build the TYPE_DECL for a template template parameter. (tsubst_decl) [TEMPLATE_DECL]: Use the TEMPLATE_DECL built by reduce_template_parm_level. adds 43acffb Daily bump. adds e8838fb 2015-07-07 Richard Biener <rguenther(a)suse.de> adds bdf88cd Cleanup arch file directive. adds 8241864 2015-07-07 Richard Biener <rguenther(a)suse.de> adds 2331e65 gcc/testsuite/ChangeLog: adds 789581b 2015-07-07 Prathamesh Kulkarni <prathamesh.kulkarni(a)linaro.org> adds ad782ae 2015-07-07 Paulo Matos <pmatos(a)broadcom.com> adds acfb072 PR target/66780 * config/sh/sh.md (symGOT_load): Revert a part of 2015-03-03 change for target/65249. adds da0aab0 MIPS: Fix the call-[1,5,6].c tests to allow the jrc instruction to be matched when testing with microMIPS. adds 54c06b77 2015-07-07 Richard Biener <rguenther(a)suse.de> adds 345fc96 MIPS: Do not generate micromips code for the no-smartmips-lwxs.c testcase adds 4d7c6f7 Add rewrite_virtuals_into_loop_closed_ssa adds 5a3d2e1 Add empty loop exit block in transform_to_exit_first_loop_alt adds 9793d5a PR jit/66779: fix segfault adds d027835 PR jit/66783: prevent use of opaque structs adds 45cfc51 [MOXIE] Hookize GO_IF_LEGITIMATE_ADDRESS adds 67ede3e c-family/ * c-ada-spec.h (cpp_operation): Add IS_MOVE_CONSTRUCTOR. * c-ada-spec.c (print_ada_declaration): Skip move constructors. cp/ * decl2.c (cpp_check): Deal with IS_MOVE_CONSTRUCTOR. adds 0052bd3 * config/i386/i386.md (*jcc_bt<mode>): Only split before reload. Remove operand constraints. Change operand 2 predicate to nonmemory operand. Limit const_int values to mode bitsize. Only allow const_int values less than 32 when optimizing for size. (*jcc_bt<mode>_1, *jcc_bt<mode>_mask): Only split before reload. Remove operand constraints. (*bt<mode>): Use SImode for const_int values less than 32. (regmode): Remove mode attribute. adds b920883 Daily bump. adds 9ef1621 2015-07-07 Andrew MacLeod <amacleod(a)redhat.com> adds 5ae4887 * target.def (rtx_costs): Remove "code" param, add "mode". * rtl.h (rtx_cost, get_full_rtx_cost): Update prototype. (set_src_cost, get_full_set_src_cost): Likewise. Move later in file. (set_rtx_cost, get_full_set_rtx_cost): Move later in file. * rtlanal.c (rtx_cost): Add "mode" parameter. Update targetm.rtx_costs call. Track mode when given in rtx. (get_full_rtx_cost): Add "mode" parameter. Update rtx_cost calls. (default_address_cost): Pass Pmode to rtx_ [...] adds 4edfb4e fix changelog pasto adds 0b21e78 * getruntime.c (get_run_time) [__USE_GNU]: Use RUSAGE_SELF as argument 1 of getrusage call. adds e3b4d46 2015-07-08 Richard Biener <rguenther(a)suse.de> adds 023b614 MIPS: Do not build the stack-1.c testcase for micromips. adds c53e881 [ARM] Initialise cost to COSTS_N_INSNS (1) and increment in arm rtx costs adds c240086 [PATCH][ARM]Adjust compiling options for "gcc.target/arm/unsigned-float.c" with hardfloat toolchain. adds 66259e2 * config/i386/i386.md (*jcc_bt<mode>): Only allow const_int values more than or equal 8 and less than 32 when optimizing for size. adds 815c8a8 MIPS: Fix failing branch range checks for micromips. adds 2324307 PR c++/66748 * tree.c (handle_abi_tag_attribute): Check for CLASS_TYPE_P before accessing TYPE_LANG_SPECIFIC node. adds b85ca4c S/390: Remove assertion in s390_init_frame_layout. adds 15381b1 2015-07-08 Richard Biener <rguenther(a)suse.de> adds 947f174 2015-07-08 Richard Biener <rguenther(a)suse.de> adds facae23 Fix PR bootstrap/66744. adds 60084b2 Fix libgomp.c/parloops-exit-first-loop-alt{,-3}.c testcases adds e93a6f3 PR jit/66783: improve error messages adds a5ea4da Address -Wsign-compare diagnostics adds 9ba13af Fix comments in a jit testcase adds fe265ad [nvptx offloading] Only 64-bit configurations are currently supported adds 15d96f9 2015-07-08 Vladimir Makarov <vmakarov(a)redhat.com> adds cacef50 liboffloadmic plugin: Address -Wnarrowing diagnostics adds ae18d4c 2015-07-08 Paolo Carlini <paolo.carlini(a)oracle.com> adds b0f200d Don't pass/return vectors in registers for IAMCU adds 565f322 2015-07-08 Iain Sandoe <iain(a)codesourcery.com> adds 111f022 Add abort prototype to readeflags-1.c/writeeflags-1.c adds b75bf56 * config/i386/predicates.md (general_reg_operand): Use GENERAL_REGNO_P. adds 04d7d3e Compile pr37870.c with -mlong-double-80 adds 81a13bd Allow <adxintrin.h> for IA MCU adds 3c70ff3 [AArch64] Define TARGET_UNSPEC_MAY_TRAP_P adds 386ef92 * c-omp.c (c_omp_declare_simd_clauses_to_numbers): If all clauses are to be removed, return NULL rather than original clauses list. adds 0124237 c-family/ * c-ada-spec.h (cpp_operation): Add IS_CONSTEXPR. * c-ada-spec.c (print_ada_declaration): Skip constexpr constructors. cp/ * decl2.c (cpp_check): Deal with IS_CONSTEXPR. adds 7e3650b PR testsuite/66796 * gcc.target/hppa/shadd-1.c: Avoid the read-modify-write so as to have a single memory reference. adds bddd01c Daily bump. adds 5fe18e7 reduce conditional compilation for LOAD_EXTEND_OP adds d836e31 remove #if for HAVE_cc0 in combine.c adds d0b9971 always define SHORT_IMMEDIATES_SIGN_EXTEND adds 3c05b49 use #if for HARD_FRAME_POINTER_IS_FRAME_POINTER less adds 7ff2eb8 always define AUTO_INC_DEC adds 32aa77d reduce conditional compilation based on AUTO_INC_DEC adds 94f1fba always define WORD_REGISTER_OPERATIONS adds 9ae0476 * g++.dg/debug/dwarf2/*.C: generate dwarf-2 debug information even when dwarf-2 is not the default. adds 44e4689 2015-07-08 Kito Cheng <kito.cheng(a)gmail.com> adds 0a2874c 2015-07-09 Richard Biener <rguenther(a)suse.de> adds 67792e5 2015-07-08 Richard Biener <rguenther(a)suse.de> adds 07d294f PR tree-optimization/66718 * Makefile.in (OBJS): Add gimple-laddress.o. * passes.def: Schedule pass_laddress. * timevar.def (DEFTIMEVAR): Add TV_GIMPLE_LADDRESS. * tree-pass.h (make_pass_laddress): Declare. * gimple-laddress.c: New file. adds 849a880 Check int_size_in_bytes in ix86_return_in_memory adds 80bf41f Define ATTRIBUTE_ALIGNED_VALUE to 32 for IA MCU adds 52758cd 2015-07-09 Paolo Carlini <paolo.carlini(a)oracle.com> adds 1eacc14 2015-07-09 Andrew MacLeod <amacleod(a)redhat.com> adds b87918f Update config/i386/iamcu.h adds 2bc3151 2015-07-09 Richard Biener <rguenther(a)suse.de> adds f61de24 2015-07-09 Andrew MacLeod <amacleod(a)redhat.com> adds 1d09f02 2015-07-09 Szabolcs Nagy <szabolcs.nagy(a)arm.com> adds e803d03 * getruntime.c (RUSAGE_SELF): Define if not already defined. (get_runtime): Use RUSAGE_SELF as argument 1 of getrusage call. adds e14647a 2015-07-09 Paolo Carlini <paolo.carlini(a)oracle.com> adds 651c1bd PR target/66814 * config/i386/predicates.md (nonimmediate_gr_operand): New predicate. * config/i386/i386.md (not peephole2): Use nonimmediate_gr_operand. (varous peephole2s): Use {GENERAL,SSE,MMX}_REGNO_P instead of {GENERAL_SSE_MMX}_REG_P where appropriate. adds 75c3f23 * genmatch.c (fprintf_indent): New function. (operand::gen_transform): Add indent parameter. (expr::gen_transform, c_expr::gen_transform, capture::gen_transform): Ditto and use fprintf_indent. (dt_node::gen, dt_node::gen_kids, dt_node::gen_kids_1): Ditto. (dt_operand::gen, dt_operand::gen_predicate, dt_operand::gen_match_op, dt_operand::gen_gimple_expr, dt_operand::gen_generic_expr, dt_simplify::gen): Ditto. (decision_tree::gen_gimple): Adjust calls and inde [...] adds 853a01d 2015-07-09 Vladimir Makarov <vmakarov(a)redhat.com> new 150a5d4 Add -mcost= and -mschedule= options to x86 backend new 74060e1 Add support for -mcost=iamcu This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5c061fb) \ N -- N -- N refs/heads/hjl/tune/cost-sched (74060e1) You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 1320 +++++++++++++++++++- gcc/DATESTAMP | 2 +- gcc/Makefile.in | 1 + gcc/ada/ChangeLog | 14 + gcc/ada/gcc-interface/cuintp.c | 3 +- gcc/ada/gcc-interface/decl.c | 3 +- gcc/ada/gcc-interface/misc.c | 3 +- gcc/ada/gcc-interface/targtyps.c | 3 +- gcc/ada/gcc-interface/trans.c | 3 +- gcc/ada/gcc-interface/utils.c | 3 +- gcc/ada/gcc-interface/utils2.c | 3 +- gcc/ada/s-oscons-tmplt.c | 7 +- gcc/alias.c | 17 +- gcc/asan.c | 17 +- gcc/attribs.c | 11 +- gcc/auto-inc-dec.c | 33 +- gcc/auto-profile.c | 20 +- gcc/{config/s390/s390intrin.h => backend.h} | 32 +- gcc/bb-reorder.c | 13 +- gcc/bt-load.c | 13 +- gcc/builtins.c | 128 +- gcc/c-family/ChangeLog | 43 + gcc/c-family/array-notation-common.c | 3 +- gcc/c-family/c-ada-spec.c | 17 +- gcc/c-family/c-ada-spec.h | 2 + gcc/c-family/c-cilkplus.c | 3 +- gcc/c-family/c-common.h | 2 - gcc/c-family/c-cppbuiltin.c | 1 - gcc/c-family/c-dump.c | 1 - gcc/c-family/c-format.c | 1 - gcc/c-family/c-gimplify.c | 15 +- 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gcc/testsuite/g++.dg/debug/dwarf2/namespace-2.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/nested-1.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/nested-2.C | 2 +- .../g++.dg/debug/dwarf2/non-virtual-thunk.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/pr44641.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/pr46527.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/pr54508.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/pubnames-1.C | 2 +- .../g++.dg/debug/dwarf2/redeclaration-1.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/self-ref-1.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/self-ref-2.C | 2 +- .../g++.dg/debug/dwarf2/static-data-member1.C | 2 +- .../g++.dg/debug/dwarf2/static-local-var-in-ctor.C | 2 +- .../g++.dg/debug/dwarf2/template-func-params-1.C | 2 +- .../g++.dg/debug/dwarf2/template-func-params-2.C | 2 +- .../g++.dg/debug/dwarf2/template-func-params-3.C | 2 +- .../g++.dg/debug/dwarf2/template-func-params-4.C | 2 +- .../g++.dg/debug/dwarf2/template-func-params-5.C | 2 +- .../g++.dg/debug/dwarf2/template-func-params-6.C | 2 +- .../g++.dg/debug/dwarf2/template-func-params-7.C | 2 +- .../g++.dg/debug/dwarf2/template-params-1.C | 2 +- .../g++.dg/debug/dwarf2/template-params-10.C | 2 +- .../g++.dg/debug/dwarf2/template-params-11.C | 2 +- .../g++.dg/debug/dwarf2/template-params-2.C | 2 +- .../g++.dg/debug/dwarf2/template-params-3.C | 2 +- .../g++.dg/debug/dwarf2/template-params-4.C | 2 +- .../g++.dg/debug/dwarf2/template-params-5.C | 2 +- .../g++.dg/debug/dwarf2/template-params-6.C | 2 +- .../g++.dg/debug/dwarf2/template-params-7.C | 2 +- .../g++.dg/debug/dwarf2/template-params-8.C | 2 +- .../g++.dg/debug/dwarf2/template-params-9.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/typedef1.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/typedef2.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/typedef3.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/typedef4.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/typedef5.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/typedef6.C | 2 +- gcc/testsuite/g++.dg/other/dump-ada-spec-8.C | 12 + .../other/{dump-ada-spec-3.C => dump-ada-spec-9.C} | 9 +- gcc/testsuite/g++.dg/vect/simd-clone-1.cc | 55 + gcc/testsuite/g++.dg/vect/vect.exp | 2 +- gcc/testsuite/gcc.c-torture/execute/pr65956.c | 67 + gcc/testsuite/gcc.c-torture/execute/pr66757.c | 15 + gcc/testsuite/gcc.dg/dx-test.c | 5 + gcc/testsuite/gcc.dg/plugin/wide-int_plugin.c | 4 +- gcc/testsuite/gcc.dg/torture/pr66733-1.c | 28 + gcc/testsuite/gcc.dg/torture/pr66733-2.c | 46 + gcc/testsuite/gcc.dg/torture/pr66759.c | 11 + gcc/testsuite/gcc.dg/torture/pr66793.c | 26 + gcc/testsuite/gcc.dg/torture/pr66794.c | 22 + gcc/testsuite/gcc.dg/vect/pr48052.c | 6 +- gcc/testsuite/gcc.dg/vect/tree-vect.h | 8 +- gcc/testsuite/gcc.dg/vect/vect-126.c | 63 + .../gcc.dg/vect/vect-over-widen-3-big-array.c | 2 +- gcc/testsuite/gcc.target/aarch64/fnmul-1.c | 16 + gcc/testsuite/gcc.target/aarch64/fnmul-2.c | 18 + gcc/testsuite/gcc.target/aarch64/fnmul-3.c | 16 + gcc/testsuite/gcc.target/aarch64/fnmul-4.c | 16 + gcc/testsuite/gcc.target/arm/aapcs/align1.c | 29 + gcc/testsuite/gcc.target/arm/aapcs/align2.c | 30 + gcc/testsuite/gcc.target/arm/aapcs/align3.c | 42 + gcc/testsuite/gcc.target/arm/aapcs/align4.c | 29 + gcc/testsuite/gcc.target/arm/aapcs/align_rec1.c | 36 + gcc/testsuite/gcc.target/arm/aapcs/align_rec2.c | 41 + gcc/testsuite/gcc.target/arm/aapcs/align_rec3.c | 43 + gcc/testsuite/gcc.target/arm/aapcs/align_rec4.c | 33 + gcc/testsuite/gcc.target/arm/aapcs/align_vaarg1.c | 36 + gcc/testsuite/gcc.target/arm/aapcs/align_vaarg2.c | 30 + gcc/testsuite/gcc.target/arm/attr_arm.c | 6 +- gcc/testsuite/gcc.target/arm/attr_thumb-static.c | 5 +- gcc/testsuite/gcc.target/arm/attr_thumb.c | 6 +- gcc/testsuite/gcc.target/arm/flip-thumb.c | 4 +- gcc/testsuite/gcc.target/arm/unsigned-float.c | 3 +- gcc/testsuite/gcc.target/hppa/shadd-1.c | 2 +- gcc/testsuite/gcc.target/i386/bt-3.c | 14 + gcc/testsuite/gcc.target/i386/{bt-1.c => bt-4.c} | 7 +- gcc/testsuite/gcc.target/i386/pr37870.c | 2 +- gcc/testsuite/gcc.target/i386/pr53383-1.c | 8 + gcc/testsuite/gcc.target/i386/pr53383-2.c | 8 + gcc/testsuite/gcc.target/i386/pr53383-3.c | 8 + gcc/testsuite/gcc.target/i386/pr66334.c | 41 + .../gcc.target/i386/{addr-sel-1.c => pr66749.c} | 5 +- .../gcc.target/i386/{vect-args.c => pr66806.c} | 9 +- gcc/testsuite/gcc.target/i386/pr66814.c | 4 + .../torture/pr8081.c => gcc.target/i386/pr66817.c} | 4 +- gcc/testsuite/gcc.target/i386/pr66818.c | 5 + gcc/testsuite/gcc.target/i386/readeflags-1.c | 2 + gcc/testsuite/gcc.target/i386/writeeflags-1.c | 2 + gcc/testsuite/gcc.target/mips/branch-10.c | 2 +- gcc/testsuite/gcc.target/mips/branch-11.c | 2 +- gcc/testsuite/gcc.target/mips/branch-12.c | 2 +- gcc/testsuite/gcc.target/mips/branch-13.c | 2 +- gcc/testsuite/gcc.target/mips/branch-2.c | 2 +- gcc/testsuite/gcc.target/mips/branch-3.c | 2 +- gcc/testsuite/gcc.target/mips/branch-4.c | 2 +- gcc/testsuite/gcc.target/mips/branch-5.c | 2 +- gcc/testsuite/gcc.target/mips/branch-6.c | 2 +- gcc/testsuite/gcc.target/mips/branch-7.c | 2 +- gcc/testsuite/gcc.target/mips/branch-8.c | 2 +- gcc/testsuite/gcc.target/mips/branch-9.c | 2 +- gcc/testsuite/gcc.target/mips/branch-helper.h | 20 + gcc/testsuite/gcc.target/mips/call-1.c | 8 +- gcc/testsuite/gcc.target/mips/call-5.c | 4 +- gcc/testsuite/gcc.target/mips/call-6.c | 4 +- gcc/testsuite/gcc.target/mips/near-far-3.c | 2 +- gcc/testsuite/gcc.target/mips/no-smartmips-lwxs.c | 2 +- gcc/testsuite/gcc.target/mips/stack-1.c | 4 +- .../mips/{branch-7.c => umips-branch-10.c} | 4 +- .../mips/{branch-8.c => umips-branch-11.c} | 6 +- .../mips/{branch-9.c => umips-branch-12.c} | 4 +- .../mips/{branch-10.c => umips-branch-13.c} | 6 +- .../mips/{branch-11.c => umips-branch-14.c} | 4 +- .../mips/{branch-12.c => umips-branch-15.c} | 6 +- .../mips/{branch-13.c => umips-branch-16.c} | 4 +- .../mips/{branch-2.c => umips-branch-5.c} | 4 +- .../mips/{branch-3.c => umips-branch-6.c} | 4 +- .../mips/{branch-4.c => umips-branch-7.c} | 6 +- .../mips/{branch-5.c => umips-branch-8.c} | 4 +- .../mips/{branch-4.c => umips-branch-9.c} | 6 +- gcc/testsuite/gcc.target/nios2/gprel-offset.c | 20 + gcc/testsuite/gcc.target/powerpc/shift-int.c | 23 + gcc/testsuite/gfortran.dg/alloc_comp_class_3.f03 | 55 + gcc/testsuite/gfortran.dg/alloc_comp_class_4.f03 | 105 ++ .../gfortran.dg/allocate_with_source_9.f08 | 29 + gcc/testsuite/gfortran.dg/iomsg_2.f90 | 44 + gcc/testsuite/gfortran.dg/pr66725.f90 | 31 + gcc/testsuite/jit.dg/all-non-failing-tests.h | 10 + ...error-gcc_jit_block_end_with_switch-NULL-case.c | 20 +- ...error-gcc_jit_context_new_field-opaque-struct.c | 31 + ...rror-gcc_jit_context_new_global-opaque-struct.c | 32 + ...ror-gcc_jit_function_new_local-opaque-struct.c} | 34 +- .../jit.dg/test-error-mismatching-types-in-call.c | 2 +- gcc/testsuite/jit.dg/test-pr66779.c | 143 +++ gcc/timevar.def | 1 + gcc/toplev.c | 28 +- gcc/tracer.c | 17 +- gcc/trans-mem.c | 21 +- gcc/tree-affine.c | 15 +- gcc/tree-browser.c | 3 +- gcc/tree-call-cdce.c | 18 +- gcc/tree-cfg.c | 56 +- gcc/tree-cfg.h | 1 + gcc/tree-cfgcleanup.c | 23 +- gcc/tree-chkp-opt.c | 26 +- gcc/tree-chkp.c | 26 +- gcc/tree-chrec.c | 10 +- gcc/tree-complex.c | 23 +- gcc/tree-core.h | 2 + gcc/tree-data-ref.c | 17 +- gcc/tree-dfa.c | 23 +- gcc/tree-diagnostic.c | 3 +- gcc/tree-dump.c | 1 - gcc/tree-eh.c | 23 +- gcc/tree-emutls.c | 22 +- gcc/tree-if-conv.c | 23 +- gcc/tree-inline.c | 24 +- gcc/tree-into-ssa.c | 23 +- gcc/tree-iterator.c | 3 +- gcc/tree-loop-distribution.c | 22 +- gcc/tree-nested.c | 16 +- gcc/tree-nrv.c | 20 +- gcc/tree-object-size.c | 23 +- gcc/tree-outof-ssa.c | 25 +- gcc/tree-parloops.c | 110 +- gcc/tree-pass.h | 1 + gcc/tree-phinodes.c | 20 +- gcc/tree-predcom.c | 23 +- gcc/tree-pretty-print.c | 6 +- gcc/tree-profile.c | 20 +- gcc/tree-scalar-evolution.c | 22 +- gcc/tree-sra.c | 28 +- gcc/tree-ssa-address.c | 15 +- gcc/tree-ssa-alias.c | 20 +- gcc/tree-ssa-ccp.c | 39 +- gcc/tree-ssa-coalesce.c | 23 +- gcc/tree-ssa-copy.c | 22 +- gcc/tree-ssa-copyrename.c | 22 +- gcc/tree-ssa-dce.c | 23 +- gcc/tree-ssa-dom.c | 22 +- gcc/tree-ssa-dse.c | 24 +- gcc/tree-ssa-forwprop.c | 23 +- gcc/tree-ssa-ifcombine.c | 21 +- gcc/tree-ssa-live.c | 26 +- gcc/tree-ssa-loop-ch.c | 16 +- gcc/tree-ssa-loop-im.c | 22 +- gcc/tree-ssa-loop-ivcanon.c | 22 +- gcc/tree-ssa-loop-ivopts.c | 25 +- gcc/tree-ssa-loop-manip.c | 73 +- gcc/tree-ssa-loop-manip.h | 1 + gcc/tree-ssa-loop-niter.c | 23 +- gcc/tree-ssa-loop-prefetch.c | 26 +- gcc/tree-ssa-loop-unswitch.c | 20 +- gcc/tree-ssa-loop.c | 16 +- gcc/tree-ssa-math-opts.c | 24 +- gcc/tree-ssa-operands.c | 21 +- gcc/tree-ssa-phiopt.c | 23 +- gcc/tree-ssa-phiprop.c | 22 +- gcc/tree-ssa-pre.c | 23 +- gcc/tree-ssa-propagate.c | 94 +- gcc/tree-ssa-reassoc.c | 25 +- gcc/tree-ssa-sccvn.c | 23 +- gcc/tree-ssa-scopedtables.c | 1 - gcc/tree-ssa-sink.c | 20 +- gcc/tree-ssa-strlen.c | 24 +- gcc/tree-ssa-structalias.c | 25 +- gcc/tree-ssa-tail-merge.c | 20 +- gcc/tree-ssa-ter.c | 23 +- gcc/tree-ssa-threadedge.c | 22 +- gcc/tree-ssa-threadupdate.c | 20 +- gcc/tree-ssa-uncprop.c | 20 +- gcc/tree-ssa-uninit.c | 21 +- gcc/tree-ssa.c | 22 +- gcc/tree-ssanames.c | 20 +- gcc/tree-stdarg.c | 24 +- gcc/tree-streamer-in.c | 16 +- gcc/tree-streamer-out.c | 15 +- gcc/tree-streamer.c | 14 +- gcc/tree-switch-conversion.c | 28 +- gcc/tree-tailcall.c | 22 +- gcc/tree-vect-data-refs.c | 23 +- gcc/tree-vect-generic.c | 21 +- gcc/tree-vect-loop-manip.c | 24 +- gcc/tree-vect-loop.c | 23 +- gcc/tree-vect-patterns.c | 21 +- gcc/tree-vect-slp.c | 21 +- gcc/tree-vect-stmts.c | 206 +-- gcc/tree-vectorizer.c | 20 +- gcc/tree-vrp.c | 23 +- gcc/tree.c | 38 +- gcc/tree.h | 1 + gcc/tsan.c | 21 +- gcc/ubsan.c | 21 +- gcc/valtrack.c | 15 +- gcc/valtrack.h | 4 - gcc/value-prof.c | 23 +- gcc/var-tracking.c | 11 +- gcc/varasm.c | 9 +- gcc/varpool.c | 14 +- gcc/vmsdbgout.c | 2 - gcc/vtable-verify.c | 22 +- gcc/web.c | 12 +- gcc/wide-int.cc | 3 +- gcc/xcoffout.c | 1 - libcpp/ChangeLog | 5 + libcpp/include/line-map.h | 2 +- libgfortran/ChangeLog | 7 + libgfortran/Makefile.am | 6 - libgfortran/Makefile.in | 81 +- libgfortran/fmain.c | 24 - libgomp/ChangeLog | 29 + libgomp/libgomp.h | 3 + libgomp/plugin/plugin-nvptx.c | 5 + .../libgomp.c/parloops-exit-first-loop-alt-3.c | 5 + .../libgomp.c/parloops-exit-first-loop-alt.c | 28 +- libgomp/testsuite/libgomp.oacc-c++/c++.exp | 6 + libgomp/testsuite/libgomp.oacc-c/c.exp | 6 + libgomp/testsuite/libgomp.oacc-fortran/fortran.exp | 6 + libiberty/ChangeLog | 5 + libiberty/getruntime.c | 6 +- libitm/ChangeLog | 5 + libitm/config/powerpc/sjlj.S | 8 +- liboffloadmic/ChangeLog | 6 + liboffloadmic/plugin/Makefile.am | 2 +- liboffloadmic/plugin/Makefile.in | 2 +- libstdc++-v3/ChangeLog | 37 + libstdc++-v3/doc/html/manual/bugs.html | 3 + libstdc++-v3/doc/html/manual/configure.html | 5 +- libstdc++-v3/doc/html/manual/status.html | 14 +- libstdc++-v3/doc/xml/manual/status_cxx2017.xml | 8 +- libstdc++-v3/include/Makefile.am | 1 + libstdc++-v3/include/Makefile.in | 1 + libstdc++-v3/include/bits/hashtable.h | 19 +- libstdc++-v3/include/experimental/propagate_const | 535 ++++++++ .../unordered_set/max_load_factor/robustness.cc | 34 +- .../propagate_const/assignment/copy.cc} | 20 +- .../swap.cc => propagate_const/assignment/move.cc} | 62 +- .../assignment/move_neg.cc} | 32 +- .../propagate_const/cons/copy.cc} | 18 +- .../propagate_const/cons/default.cc} | 23 +- .../hash/hash.cc => propagate_const/cons/move.cc} | 39 +- .../swap.cc => propagate_const/cons/move_neg.cc} | 57 +- .../make_observer.cc => propagate_const/hash/1.cc} | 17 +- .../experimental/propagate_const/observers/1.cc | 65 + .../experimental/propagate_const/relops/1.cc | 67 + .../4.cc => propagate_const/requirements1.cc} | 27 +- .../hash.cc => propagate_const/requirements2.cc} | 32 +- .../1.cc => propagate_const/requirements3.cc} | 17 +- .../requirements4.cc} | 21 +- .../1.cc => propagate_const/requirements5.cc} | 17 +- .../make_observer.cc => propagate_const/swap/1.cc} | 19 +- .../{any => propagate_const}/typedefs.cc | 16 +- 874 files changed, 9800 insertions(+), 7979 deletions(-) copy gcc/{config/s390/s390intrin.h => backend.h} (58%) create mode 100644 gcc/gimple-laddress.c copy gcc/{gstab.h => ssa.h} (63%) create mode 100644 gcc/testsuite/g++.dg/abi/abi-tag15.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/auto45.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/vt-65790.C create mode 100644 gcc/testsuite/g++.dg/other/dump-ada-spec-8.C copy gcc/testsuite/g++.dg/other/{dump-ada-spec-3.C => dump-ada-spec-9.C} (74%) create mode 100644 gcc/testsuite/g++.dg/vect/simd-clone-1.cc create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr65956.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr66757.c create mode 100644 gcc/testsuite/gcc.dg/dx-test.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr66733-1.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr66733-2.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr66759.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr66793.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr66794.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-126.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fnmul-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fnmul-2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fnmul-3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fnmul-4.c create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/align1.c create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/align2.c create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/align3.c create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/align4.c create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/align_rec1.c create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/align_rec2.c create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/align_rec3.c create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/align_rec4.c create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/align_vaarg1.c create mode 100644 gcc/testsuite/gcc.target/arm/aapcs/align_vaarg2.c create mode 100644 gcc/testsuite/gcc.target/i386/bt-3.c copy gcc/testsuite/gcc.target/i386/{bt-1.c => bt-4.c} (54%) create mode 100644 gcc/testsuite/gcc.target/i386/pr53383-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr53383-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr53383-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr66334.c copy gcc/testsuite/gcc.target/i386/{addr-sel-1.c => pr66749.c} (69%) copy gcc/testsuite/gcc.target/i386/{vect-args.c => pr66806.c} (89%) create mode 100644 gcc/testsuite/gcc.target/i386/pr66814.c copy gcc/testsuite/{gcc.dg/torture/pr8081.c => gcc.target/i386/pr66817.c} (80%) create mode 100644 gcc/testsuite/gcc.target/i386/pr66818.c copy gcc/testsuite/gcc.target/mips/{branch-7.c => umips-branch-10.c} (84%) copy gcc/testsuite/gcc.target/mips/{branch-8.c => umips-branch-11.c} (60%) copy gcc/testsuite/gcc.target/mips/{branch-9.c => umips-branch-12.c} (89%) copy gcc/testsuite/gcc.target/mips/{branch-10.c => umips-branch-13.c} (59%) copy gcc/testsuite/gcc.target/mips/{branch-11.c => umips-branch-14.c} (88%) copy gcc/testsuite/gcc.target/mips/{branch-12.c => umips-branch-15.c} (59%) copy gcc/testsuite/gcc.target/mips/{branch-13.c => umips-branch-16.c} (88%) copy gcc/testsuite/gcc.target/mips/{branch-2.c => umips-branch-5.c} (80%) copy gcc/testsuite/gcc.target/mips/{branch-3.c => umips-branch-6.c} (79%) copy gcc/testsuite/gcc.target/mips/{branch-4.c => umips-branch-7.c} (57%) copy gcc/testsuite/gcc.target/mips/{branch-5.c => umips-branch-8.c} (84%) copy gcc/testsuite/gcc.target/mips/{branch-4.c => umips-branch-9.c} (57%) create mode 100644 gcc/testsuite/gcc.target/nios2/gprel-offset.c create mode 100644 gcc/testsuite/gcc.target/powerpc/shift-int.c create mode 100644 gcc/testsuite/gfortran.dg/alloc_comp_class_3.f03 create mode 100644 gcc/testsuite/gfortran.dg/alloc_comp_class_4.f03 create mode 100644 gcc/testsuite/gfortran.dg/allocate_with_source_9.f08 create mode 100644 gcc/testsuite/gfortran.dg/iomsg_2.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr66725.f90 create mode 100644 gcc/testsuite/jit.dg/test-error-gcc_jit_context_new_field-opaque-struct.c create mode 100644 gcc/testsuite/jit.dg/test-error-gcc_jit_context_new_global-opaque-struct.c copy gcc/testsuite/jit.dg/{test-error-unterminated-block.c => test-error-gcc_jit_function_new_local-opaque-struct.c} (50%) create mode 100644 gcc/testsuite/jit.dg/test-pr66779.c delete mode 100644 libgfortran/fmain.c create mode 100644 libstdc++-v3/include/experimental/propagate_const copy libstdc++-v3/testsuite/{20_util/duration/literals/65499.cc => experimental/propagate_const/assignment/copy.cc} (77%) copy libstdc++-v3/testsuite/experimental/{memory/observer_ptr/swap/swap.cc => propagate_const/assignment/move.cc} (56%) copy libstdc++-v3/testsuite/experimental/{memory/observer_ptr/hash/hash.cc => propagate_const/assignment/move_neg.cc} (65%) copy libstdc++-v3/testsuite/{20_util/duration/literals/65499.cc => experimental/propagate_const/cons/copy.cc} (76%) copy libstdc++-v3/testsuite/{25_algorithms/is_permutation/64646.cc => experimental/propagate_const/cons/default.cc} (77%) copy libstdc++-v3/testsuite/experimental/{memory/observer_ptr/hash/hash.cc => propagate_const/cons/move.cc} (53%) copy libstdc++-v3/testsuite/experimental/{memory/observer_ptr/swap/swap.cc => propagate_const/cons/move_neg.cc} (52%) copy libstdc++-v3/testsuite/experimental/{memory/observer_ptr/make_observer.cc => propagate_const/hash/1.cc} (72%) create mode 100644 libstdc++-v3/testsuite/experimental/propagate_const/observers/1.cc create mode 100644 libstdc++-v3/testsuite/experimental/propagate_const/relops/1.cc copy libstdc++-v3/testsuite/experimental/{optional/constexpr/observers/4.cc => propagate_const/requirements1.cc} (58%) copy libstdc++-v3/testsuite/experimental/{memory/observer_ptr/hash/hash.cc => propagate_const/requirements2.cc} (64%) copy libstdc++-v3/testsuite/experimental/{optional/constexpr/observers/1.cc => propagate_const/requirements3.cc} (74%) copy libstdc++-v3/testsuite/experimental/{memory/observer_ptr/make_observer.cc => propagate_const/requirements4.cc} (67%) copy libstdc++-v3/testsuite/experimental/{optional/constexpr/observers/1.cc => propagate_const/requirements5.cc} (74%) copy libstdc++-v3/testsuite/experimental/{memory/observer_ptr/make_observer.cc => propagate_const/swap/1.cc} (75%) copy libstdc++-v3/testsuite/experimental/{any => propagate_const}/typedefs.cc (68%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] 01/02: Add -mcost= and -mschedule= options to x86 backend

by git

This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/tune/cost-sched in repository gcc. commit 150a5d47ac247587b6ff718f0621a680fd798a57 Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Fri Jul 3 07:18:07 2015 -0700 Add -mcost= and -mschedule= options to x86 backend This patch adds -mcost= and -mschedule= options to x86 backend. They are used for tuning. --- gcc/config.gcc | 4 ++ gcc/config/i386/README.cost | 8 +++ gcc/config/i386/cost-generic.c | 90 +++++++++++++++++++++++++ gcc/config/i386/cost-intel.c | 80 ++++++++++++++++++++++ gcc/config/i386/cost.c | 86 ++++++++++++++++++++++++ gcc/config/i386/cost.h | 122 +++++++++++++++++++++++++++++++++ gcc/config/i386/i386-tune.c | 148 +++++++++++++++++++++++++++++++++++++++++ gcc/config/i386/i386-tune.h | 19 ++++++ gcc/config/i386/i386-tune.opt | 7 ++ gcc/config/i386/i386.c | 6 +- gcc/config/i386/i386.h | 2 + 11 files changed, 571 insertions(+), 1 deletion(-) diff --git a/gcc/config.gcc b/gcc/config.gcc index 900aa18..e40ef63 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -498,6 +498,10 @@ if test -f ${srcdir}/config/${cpu_type}/${cpu_type}.opt then extra_options="${extra_options} ${cpu_type}/${cpu_type}.opt" fi +if test -f ${srcdir}/config/${cpu_type}/${cpu_type}-tune.opt +then + extra_options="${extra_options} ${cpu_type}/${cpu_type}-tune.opt" +fi case ${target} in aarch64*-*-*) diff --git a/gcc/config/i386/README.cost b/gcc/config/i386/README.cost new file mode 100644 index 0000000..433187c --- /dev/null +++ b/gcc/config/i386/README.cost @@ -0,0 +1,8 @@ +1. Modify cost.c to create a new cost model. +2. Compile cost.c into cost.so: + +# gcc -o cost.so -shared -fPIC -O2 -g cost.c + +3. Use -mcost=cost to load new cost numbers from cost.so with + +# export LD_LIBRARY_PATH=directory with cost.so diff --git a/gcc/config/i386/cost-generic.c b/gcc/config/i386/cost-generic.c new file mode 100644 index 0000000..e220a53 --- /dev/null +++ b/gcc/config/i386/cost-generic.c @@ -0,0 +1,90 @@ +#include "cost.h" + +const int ix86_cost_model_size = sizeof (struct processor_costs); + +/* Generic should produce code tuned for Core-i7 (and newer chips) + and btver1 (and newer chips). */ + +static stringop_algs generic_memcpy[2] = { + {libcall, {{32, loop, false}, {8192, rep_prefix_4_byte, false}, + {-1, libcall, false}}}, + {libcall, {{32, loop, false}, {8192, rep_prefix_8_byte, false}, + {-1, libcall, false}}}}; +static stringop_algs generic_memset[2] = { + {libcall, {{32, loop, false}, {8192, rep_prefix_4_byte, false}, + {-1, libcall, false}}}, + {libcall, {{32, loop, false}, {8192, rep_prefix_8_byte, false}, + {-1, libcall, false}}}}; +const +struct processor_costs ix86_cost_model = { + COSTS_N_INSNS (1), /* cost of an add instruction */ + /* On all chips taken into consideration lea is 2 cycles and more. With + this cost however our current implementation of synth_mult results in + use of unnecessary temporary registers causing regression on several + SPECfp benchmarks. */ + COSTS_N_INSNS (1) + 1, /* cost of a lea instruction */ + COSTS_N_INSNS (1), /* variable shift costs */ + COSTS_N_INSNS (1), /* constant shift costs */ + {COSTS_N_INSNS (3), /* cost of starting multiply for QI */ + COSTS_N_INSNS (4), /* HI */ + COSTS_N_INSNS (3), /* SI */ + COSTS_N_INSNS (4), /* DI */ + COSTS_N_INSNS (2)}, /* other */ + 0, /* cost of multiply per each bit set */ + {COSTS_N_INSNS (18), /* cost of a divide/mod for QI */ + COSTS_N_INSNS (26), /* HI */ + COSTS_N_INSNS (42), /* SI */ + COSTS_N_INSNS (74), /* DI */ + COSTS_N_INSNS (74)}, /* other */ + COSTS_N_INSNS (1), /* cost of movsx */ + COSTS_N_INSNS (1), /* cost of movzx */ + 8, /* "large" insn */ + 17, /* MOVE_RATIO */ + 4, /* cost for loading QImode using movzbl */ + {4, 4, 4}, /* cost of loading integer registers + in QImode, HImode and SImode. + Relative to reg-reg move (2). */ + {4, 4, 4}, /* cost of storing integer registers */ + 4, /* cost of reg,reg fld/fst */ + {12, 12, 12}, /* cost of loading fp registers + in SFmode, DFmode and XFmode */ + {6, 6, 8}, /* cost of storing fp registers + in SFmode, DFmode and XFmode */ + 2, /* cost of moving MMX register */ + {8, 8}, /* cost of loading MMX registers + in SImode and DImode */ + {8, 8}, /* cost of storing MMX registers + in SImode and DImode */ + 2, /* cost of moving SSE register */ + {8, 8, 8}, /* cost of loading SSE registers + in SImode, DImode and TImode */ + {8, 8, 8}, /* cost of storing SSE registers + in SImode, DImode and TImode */ + 5, /* MMX or SSE register to integer */ + 32, /* size of l1 cache. */ + 512, /* size of l2 cache. */ + 64, /* size of prefetch block */ + 6, /* number of parallel prefetches */ + /* Benchmarks shows large regressions on K8 sixtrack benchmark when this + value is increased to perhaps more appropriate value of 5. */ + 3, /* Branch cost */ + COSTS_N_INSNS (8), /* cost of FADD and FSUB insns. */ + COSTS_N_INSNS (8), /* cost of FMUL instruction. */ + COSTS_N_INSNS (20), /* cost of FDIV instruction. */ + COSTS_N_INSNS (8), /* cost of FABS instruction. */ + COSTS_N_INSNS (8), /* cost of FCHS instruction. */ + COSTS_N_INSNS (40), /* cost of FSQRT instruction. */ + generic_memcpy, + generic_memset, + 1, /* scalar_stmt_cost. */ + 1, /* scalar load_cost. */ + 1, /* scalar_store_cost. */ + 1, /* vec_stmt_cost. */ + 1, /* vec_to_scalar_cost. */ + 1, /* scalar_to_vec_cost. */ + 1, /* vec_align_load_cost. */ + 2, /* vec_unalign_load_cost. */ + 1, /* vec_store_cost. */ + 3, /* cond_taken_branch_cost. */ + 1, /* cond_not_taken_branch_cost. */ +}; diff --git a/gcc/config/i386/cost-intel.c b/gcc/config/i386/cost-intel.c new file mode 100644 index 0000000..d67ebc0 --- /dev/null +++ b/gcc/config/i386/cost-intel.c @@ -0,0 +1,80 @@ +#include "cost.h" + +const int ix86_cost_model_size = sizeof (struct processor_costs); + +static stringop_algs intel_memcpy[2] = { + {libcall, {{11, loop, false}, {-1, rep_prefix_4_byte, false}}}, + {libcall, {{32, loop, false}, {64, rep_prefix_4_byte, false}, + {8192, rep_prefix_8_byte, false}, {-1, libcall, false}}}}; +static stringop_algs intel_memset[2] = { + {libcall, {{8, loop, false}, {15, unrolled_loop, false}, + {2048, rep_prefix_4_byte, false}, {-1, libcall, false}}}, + {libcall, {{24, loop, false}, {32, unrolled_loop, false}, + {8192, rep_prefix_8_byte, false}, {-1, libcall, false}}}}; +const +struct processor_costs ix86_cost_model = { + COSTS_N_INSNS (1), /* cost of an add instruction */ + COSTS_N_INSNS (1) + 1, /* cost of a lea instruction */ + COSTS_N_INSNS (1), /* variable shift costs */ + COSTS_N_INSNS (1), /* constant shift costs */ + {COSTS_N_INSNS (3), /* cost of starting multiply for QI */ + COSTS_N_INSNS (3), /* HI */ + COSTS_N_INSNS (3), /* SI */ + COSTS_N_INSNS (4), /* DI */ + COSTS_N_INSNS (2)}, /* other */ + 0, /* cost of multiply per each bit set */ + {COSTS_N_INSNS (18), /* cost of a divide/mod for QI */ + COSTS_N_INSNS (26), /* HI */ + COSTS_N_INSNS (42), /* SI */ + COSTS_N_INSNS (74), /* DI */ + COSTS_N_INSNS (74)}, /* other */ + COSTS_N_INSNS (1), /* cost of movsx */ + COSTS_N_INSNS (1), /* cost of movzx */ + 8, /* "large" insn */ + 17, /* MOVE_RATIO */ + 4, /* cost for loading QImode using movzbl */ + {4, 4, 4}, /* cost of loading integer registers + in QImode, HImode and SImode. + Relative to reg-reg move (2). */ + {4, 4, 4}, /* cost of storing integer registers */ + 4, /* cost of reg,reg fld/fst */ + {12, 12, 12}, /* cost of loading fp registers + in SFmode, DFmode and XFmode */ + {6, 6, 8}, /* cost of storing fp registers + in SFmode, DFmode and XFmode */ + 2, /* cost of moving MMX register */ + {8, 8}, /* cost of loading MMX registers + in SImode and DImode */ + {8, 8}, /* cost of storing MMX registers + in SImode and DImode */ + 2, /* cost of moving SSE register */ + {8, 8, 8}, /* cost of loading SSE registers + in SImode, DImode and TImode */ + {8, 8, 8}, /* cost of storing SSE registers + in SImode, DImode and TImode */ + 5, /* MMX or SSE register to integer */ + 32, /* size of l1 cache. */ + 256, /* size of l2 cache. */ + 64, /* size of prefetch block */ + 6, /* number of parallel prefetches */ + 3, /* Branch cost */ + COSTS_N_INSNS (8), /* cost of FADD and FSUB insns. */ + COSTS_N_INSNS (8), /* cost of FMUL instruction. */ + COSTS_N_INSNS (20), /* cost of FDIV instruction. */ + COSTS_N_INSNS (8), /* cost of FABS instruction. */ + COSTS_N_INSNS (8), /* cost of FCHS instruction. */ + COSTS_N_INSNS (40), /* cost of FSQRT instruction. */ + intel_memcpy, + intel_memset, + 1, /* scalar_stmt_cost. */ + 1, /* scalar load_cost. */ + 1, /* scalar_store_cost. */ + 1, /* vec_stmt_cost. */ + 1, /* vec_to_scalar_cost. */ + 1, /* scalar_to_vec_cost. */ + 1, /* vec_align_load_cost. */ + 2, /* vec_unalign_load_cost. */ + 1, /* vec_store_cost. */ + 3, /* cond_taken_branch_cost. */ + 1, /* cond_not_taken_branch_cost. */ +}; diff --git a/gcc/config/i386/cost.c b/gcc/config/i386/cost.c new file mode 100644 index 0000000..2ed06bc --- /dev/null +++ b/gcc/config/i386/cost.c @@ -0,0 +1,86 @@ +#include "cost.h" + +const int ix86_cost_model_size = sizeof (struct processor_costs); + +/* PentiumPro has optimized rep instructions for blocks aligned by 8 bytes + (we ensure the alignment). For small blocks inline loop is still a + noticeable win, for bigger blocks either rep movsl or rep movsb is + way to go. Rep movsb has apparently more expensive startup time in CPU, + but after 4K the difference is down in the noise. */ +static stringop_algs pentiumpro_memcpy[2] = { + {rep_prefix_4_byte, {{128, loop, false}, {1024, unrolled_loop, false}, + {8192, rep_prefix_4_byte, false}, + {-1, rep_prefix_1_byte, false}}}, + DUMMY_STRINGOP_ALGS}; +static stringop_algs pentiumpro_memset[2] = { + {rep_prefix_4_byte, {{1024, unrolled_loop, false}, + {8192, rep_prefix_4_byte, false}, + {-1, libcall, false}}}, + DUMMY_STRINGOP_ALGS}; +const +struct processor_costs ix86_cost_model = { + COSTS_N_INSNS (1), /* cost of an add instruction */ + COSTS_N_INSNS (1), /* cost of a lea instruction */ + COSTS_N_INSNS (1), /* variable shift costs */ + COSTS_N_INSNS (1), /* constant shift costs */ + {COSTS_N_INSNS (4), /* cost of starting multiply for QI */ + COSTS_N_INSNS (4), /* HI */ + COSTS_N_INSNS (4), /* SI */ + COSTS_N_INSNS (4), /* DI */ + COSTS_N_INSNS (4)}, /* other */ + 0, /* cost of multiply per each bit set */ + {COSTS_N_INSNS (17), /* cost of a divide/mod for QI */ + COSTS_N_INSNS (17), /* HI */ + COSTS_N_INSNS (17), /* SI */ + COSTS_N_INSNS (17), /* DI */ + COSTS_N_INSNS (17)}, /* other */ + COSTS_N_INSNS (1), /* cost of movsx */ + COSTS_N_INSNS (1), /* cost of movzx */ + 8, /* "large" insn */ + 6, /* MOVE_RATIO */ + 2, /* cost for loading QImode using movzbl */ + {4, 4, 4}, /* cost of loading integer registers + in QImode, HImode and SImode. + Relative to reg-reg move (2). */ + {2, 2, 2}, /* cost of storing integer registers */ + 2, /* cost of reg,reg fld/fst */ + {2, 2, 6}, /* cost of loading fp registers + in SFmode, DFmode and XFmode */ + {4, 4, 6}, /* cost of storing fp registers + in SFmode, DFmode and XFmode */ + 2, /* cost of moving MMX register */ + {2, 2}, /* cost of loading MMX registers + in SImode and DImode */ + {2, 2}, /* cost of storing MMX registers + in SImode and DImode */ + 2, /* cost of moving SSE register */ + {2, 2, 8}, /* cost of loading SSE registers + in SImode, DImode and TImode */ + {2, 2, 8}, /* cost of storing SSE registers + in SImode, DImode and TImode */ + 3, /* MMX or SSE register to integer */ + 8, /* size of l1 cache. */ + 256, /* size of l2 cache */ + 32, /* size of prefetch block */ + 6, /* number of parallel prefetches */ + 2, /* Branch cost */ + COSTS_N_INSNS (3), /* cost of FADD and FSUB insns. */ + COSTS_N_INSNS (5), /* cost of FMUL instruction. */ + COSTS_N_INSNS (56), /* cost of FDIV instruction. */ + COSTS_N_INSNS (2), /* cost of FABS instruction. */ + COSTS_N_INSNS (2), /* cost of FCHS instruction. */ + COSTS_N_INSNS (56), /* cost of FSQRT instruction. */ + pentiumpro_memcpy, + pentiumpro_memset, + 1, /* scalar_stmt_cost. */ + 1, /* scalar load_cost. */ + 1, /* scalar_store_cost. */ + 1, /* vec_stmt_cost. */ + 1, /* vec_to_scalar_cost. */ + 1, /* scalar_to_vec_cost. */ + 1, /* vec_align_load_cost. */ + 2, /* vec_unalign_load_cost. */ + 1, /* vec_store_cost. */ + 3, /* cond_taken_branch_cost. */ + 1, /* cond_not_taken_branch_cost. */ +}; diff --git a/gcc/config/i386/cost.h b/gcc/config/i386/cost.h new file mode 100644 index 0000000..2ab86ad --- /dev/null +++ b/gcc/config/i386/cost.h @@ -0,0 +1,122 @@ +/* Return the right cost to give to an operation + to make the cost of the corresponding register-to-register instruction + N times that of a fast register-to-register instruction. */ +#define COSTS_N_INSNS(N) ((N) * 4) + +#define DUMMY_STRINGOP_ALGS {libcall, {{-1, libcall, false}}} + +#define false 0 +#define true 1 + +/* Algorithm to expand string function with. */ +enum stringop_alg +{ +#undef DEF_ENUM +#define DEF_ENUM + +#undef DEF_ALG +#define DEF_ALG(alg, name) alg, + +#include "stringop.def" +last_alg + +#undef DEF_ENUM +#undef DEF_ALG +}; + +#define MAX_STRINGOP_ALGS 4 + +/* Specify what algorithm to use for stringops on known size. + When size is unknown, the UNKNOWN_SIZE alg is used. When size is + known at compile time or estimated via feedback, the SIZE array + is walked in order until MAX is greater then the estimate (or -1 + means infinity). Corresponding ALG is used then. + When NOALIGN is true the code guaranting the alignment of the memory + block is skipped. + + For example initializer: + {{256, loop}, {-1, rep_prefix_4_byte}} + will use loop for blocks smaller or equal to 256 bytes, rep prefix will + be used otherwise. */ +typedef struct stringop_algs +{ + const enum stringop_alg unknown_size; + const struct stringop_strategy { + const int max; + const enum stringop_alg alg; + int noalign; + } size [MAX_STRINGOP_ALGS]; +} stringop_algs; + +/* Define the specific costs for a given cpu */ + +struct processor_costs { + const int add; /* cost of an add instruction */ + const int lea; /* cost of a lea instruction */ + const int shift_var; /* variable shift costs */ + const int shift_const; /* constant shift costs */ + const int mult_init[5]; /* cost of starting a multiply + in QImode, HImode, SImode, DImode, TImode*/ + const int mult_bit; /* cost of multiply per each bit set */ + const int divide[5]; /* cost of a divide/mod + in QImode, HImode, SImode, DImode, TImode*/ + int movsx; /* The cost of movsx operation. */ + int movzx; /* The cost of movzx operation. */ + const int large_insn; /* insns larger than this cost more */ + const int move_ratio; /* The threshold of number of scalar + memory-to-memory move insns. */ + const int movzbl_load; /* cost of loading using movzbl */ + const int int_load[3]; /* cost of loading integer registers + in QImode, HImode and SImode relative + to reg-reg move (2). */ + const int int_store[3]; /* cost of storing integer register + in QImode, HImode and SImode */ + const int fp_move; /* cost of reg,reg fld/fst */ + const int fp_load[3]; /* cost of loading FP register + in SFmode, DFmode and XFmode */ + const int fp_store[3]; /* cost of storing FP register + in SFmode, DFmode and XFmode */ + const int mmx_move; /* cost of moving MMX register. */ + const int mmx_load[2]; /* cost of loading MMX register + in SImode and DImode */ + const int mmx_store[2]; /* cost of storing MMX register + in SImode and DImode */ + const int sse_move; /* cost of moving SSE register. */ + const int sse_load[3]; /* cost of loading SSE register + in SImode, DImode and TImode*/ + const int sse_store[3]; /* cost of storing SSE register + in SImode, DImode and TImode*/ + const int mmxsse_to_integer; /* cost of moving mmxsse register to + integer and vice versa. */ + const int l1_cache_size; /* size of l1 cache, in kilobytes. */ + const int l2_cache_size; /* size of l2 cache, in kilobytes. */ + const int prefetch_block; /* bytes moved to cache for prefetch. */ + const int simultaneous_prefetches; /* number of parallel prefetch + operations. */ + const int branch_cost; /* Default value for BRANCH_COST. */ + const int fadd; /* cost of FADD and FSUB instructions. */ + const int fmul; /* cost of FMUL instruction. */ + const int fdiv; /* cost of FDIV instruction. */ + const int fabs; /* cost of FABS instruction. */ + const int fchs; /* cost of FCHS instruction. */ + const int fsqrt; /* cost of FSQRT instruction. */ + /* Specify what algorithm + to use for stringops on unknown size. */ + struct stringop_algs *memcpy, *memset; + const int scalar_stmt_cost; /* Cost of any scalar operation, excluding + load and store. */ + const int scalar_load_cost; /* Cost of scalar load. */ + const int scalar_store_cost; /* Cost of scalar store. */ + const int vec_stmt_cost; /* Cost of any vector operation, excluding + load, store, vector-to-scalar and + scalar-to-vector operation. */ + const int vec_to_scalar_cost; /* Cost of vect-to-scalar operation. */ + const int scalar_to_vec_cost; /* Cost of scalar-to-vector operation. */ + const int vec_align_load_cost; /* Cost of aligned vector load. */ + const int vec_unalign_load_cost; /* Cost of unaligned vector load. */ + const int vec_store_cost; /* Cost of vector store. */ + const int cond_taken_branch_cost; /* Cost of taken branch for vectorizer + cost model. */ + const int cond_not_taken_branch_cost;/* Cost of not taken branch for + vectorizer cost model. */ +}; diff --git a/gcc/config/i386/i386-tune.c b/gcc/config/i386/i386-tune.c new file mode 100644 index 0000000..9cf702c --- /dev/null +++ b/gcc/config/i386/i386-tune.c @@ -0,0 +1,148 @@ +#include <dlfcn.h> + +#define COST_MODEL "ix86_cost_model" +#define COST_MODEL_SIZE COST_MODEL "_size" + +static const struct processor_costs * +load_cost_model (const char *model) +{ + const struct processor_costs *cost; + int *cost_size; + void *handle; + char *dso = (char *) alloca (strlen (model) + sizeof ".so"); + + strcpy (stpcpy (dso, model), ".so"); + + handle = dlopen (dso, RTLD_LAZY); + if (handle == NULL) + { + fprintf(stderr, "load_cost_model: dlopen: %s\n", dlerror ()); + return NULL; + } + + cost = (const struct processor_costs *) dlsym (handle, COST_MODEL); + if (cost == NULL) + { + fprintf(stderr, "load_cost_model: dlsym: %s\n", dlerror ()); + goto error_return; + } + + cost_size = (int *) dlsym (handle, COST_MODEL_SIZE); + if (cost == NULL) + { + fprintf(stderr, "load_cost_model: dlsym: %s\n", dlerror ()); + goto error_return; + } + + if (*cost_size != sizeof (*cost)) + { + fprintf(stderr, "load_cost_model: cost model size %d != %d\n", + *cost_size, (int) sizeof (*cost)); + cost = NULL; + } + +error_return: + if (cost == NULL) + dlclose (handle); + + return cost; +} + +void +x86_tune_options (void) +{ + if (x86_cost_string) + { + if (strcmp (x86_cost_string, "size") == 0) + ix86_cost = &ix86_size_cost; + else if (strcmp (x86_cost_string, "i386") == 0) + ix86_cost = &i386_cost; + else if (strcmp (x86_cost_string, "i486") == 0) + ix86_cost = &i486_cost; + else if (strcmp (x86_cost_string, "pentium") == 0) + ix86_cost = &pentium_cost; + else if (strcmp (x86_cost_string, "pentiumpro") == 0) + ix86_cost = &pentiumpro_cost; + else if (strcmp (x86_cost_string, "geode") == 0) + ix86_cost = &geode_cost; + else if (strcmp (x86_cost_string, "k6") == 0) + ix86_cost = &k6_cost; + else if (strcmp (x86_cost_string, "athlon") == 0) + ix86_cost = &athlon_cost; + else if (strcmp (x86_cost_string, "k8") == 0) + ix86_cost = &k8_cost; + else if (strcmp (x86_cost_string, "amdfam10") == 0) + ix86_cost = &amdfam10_cost; + else if (strcmp (x86_cost_string, "bdver1") == 0) + ix86_cost = &bdver1_cost; + else if (strcmp (x86_cost_string, "bdver2") == 0) + ix86_cost = &bdver2_cost; + else if (strcmp (x86_cost_string, "bdver3") == 0) + ix86_cost = &bdver3_cost; + else if (strcmp (x86_cost_string, "bdver4") == 0) + ix86_cost = &bdver4_cost; + else if (strcmp (x86_cost_string, "btver1") == 0) + ix86_cost = &btver1_cost; + else if (strcmp (x86_cost_string, "btver2") == 0) + ix86_cost = &btver2_cost; + else if (strcmp (x86_cost_string, "pentium4") == 0) + ix86_cost = &pentium4_cost; + else if (strcmp (x86_cost_string, "nocona") == 0) + ix86_cost = &nocona_cost; + else if (strcmp (x86_cost_string, "atom") == 0) + ix86_cost = &atom_cost; + else if (strcmp (x86_cost_string, "slm") == 0) + ix86_cost = &slm_cost; + else if (strcmp (x86_cost_string, "generic") == 0) + ix86_cost = &generic_cost; + else if (strcmp (x86_cost_string, "core") == 0) + ix86_cost = &core_cost; + else + { + ix86_cost = load_cost_model (x86_cost_string); + if (ix86_cost == NULL) + abort (); + } + } + if (x86_schedule_string) + { + if (strcmp (x86_schedule_string, "none") == 0) + ix86_schedule = CPU_NONE; + else if (strcmp (x86_schedule_string, "pentium") == 0) + ix86_schedule = CPU_PENTIUM; + else if (strcmp (x86_schedule_string, "pentiumpro") == 0) + ix86_schedule = CPU_PENTIUMPRO; + else if (strcmp (x86_schedule_string, "geode") == 0) + ix86_schedule = CPU_GEODE; + else if (strcmp (x86_schedule_string, "k6") == 0) + ix86_schedule = CPU_K6; + else if (strcmp (x86_schedule_string, "athlon") == 0) + ix86_schedule = CPU_ATHLON; + else if (strcmp (x86_schedule_string, "k8") == 0) + ix86_schedule = CPU_K8; + else if (strcmp (x86_schedule_string, "core2") == 0) + ix86_schedule = CPU_CORE2; + else if (strcmp (x86_schedule_string, "corei7") == 0) + ix86_schedule = CPU_NEHALEM; + else if (strcmp (x86_schedule_string, "atom") == 0) + ix86_schedule = CPU_ATOM; + else if (strcmp (x86_schedule_string, "slm") == 0) + ix86_schedule = CPU_SLM; + else if (strcmp (x86_schedule_string, "generic") == 0) + ix86_schedule = CPU_GENERIC; + else if (strcmp (x86_schedule_string, "amdfam10") == 0) + ix86_schedule = CPU_AMDFAM10; + else if (strcmp (x86_schedule_string, "bdver1") == 0) + ix86_schedule = CPU_BDVER1; + else if (strcmp (x86_schedule_string, "bdver2") == 0) + ix86_schedule = CPU_BDVER2; + else if (strcmp (x86_schedule_string, "bdver3") == 0) + ix86_schedule = CPU_BDVER3; + else if (strcmp (x86_schedule_string, "bdver4") == 0) + ix86_schedule = CPU_BDVER4; + else if (strcmp (x86_schedule_string, "btver2") == 0) + ix86_schedule = CPU_BTVER2; + else + abort (); + } +} diff --git a/gcc/config/i386/i386-tune.h b/gcc/config/i386/i386-tune.h new file mode 100644 index 0000000..50ab949 --- /dev/null +++ b/gcc/config/i386/i386-tune.h @@ -0,0 +1,19 @@ +/* Tuning options: + + -mcost=[size|i386|i486|pentium|pentiumpro|geode|k6|athlon|k8|amdfam10|bdver1|bdver2|bdver3|bdver4|btver1|btver2|pentium4|nocona|atom|slm|generic|core] + + -missue-rate=NUMBER + + -madjust-cost=NUMBER + + -mmultipass-dfa-lookahead=NUMBER + + */ + +extern void x86_tune_options (void); + +extern int ix86_issue_rate_value; + +extern int ix86_adjust_cost_value; + +extern int ia32_multipass_dfa_lookahead_value; diff --git a/gcc/config/i386/i386-tune.opt b/gcc/config/i386/i386-tune.opt new file mode 100644 index 0000000..d1bcc88 --- /dev/null +++ b/gcc/config/i386/i386-tune.opt @@ -0,0 +1,7 @@ +; Tuning options for i386. + +mcost= +Target RejectNegative Joined Report Var(x86_cost_string) Undocumented + +mschedule= +Target RejectNegative Joined Report Var(x86_schedule_string) Undocumented diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 54ee6f3..3eae830 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3917,7 +3917,7 @@ ix86_option_override_internal (bool main_args_p, ix86_tune = processor_alias_table[i].processor; if (TARGET_64BIT_P (opts->x_ix86_isa_flags)) { - if (!(processor_alias_table[i].flags & PTA_64BIT)) + if (0 && !(processor_alias_table[i].flags & PTA_64BIT)) { if (ix86_tune_defaulted) { @@ -4003,6 +4003,8 @@ ix86_option_override_internal (bool main_args_p, else ix86_cost = ix86_tune_cost; + x86_tune_options (); + /* Arrange to set up i386_stack_locals for all functions. */ init_machine_status = ix86_init_machine_status; @@ -52679,6 +52681,8 @@ ix86_operands_ok_for_move_multiple (rtx *operands, bool load, #undef TARGET_ABSOLUTE_BIGGEST_ALIGNMENT #define TARGET_ABSOLUTE_BIGGEST_ALIGNMENT 512 +#include "config/i386/i386-tune.c" + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-i386.h" diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 74334ff..8fc5606 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2577,3 +2577,5 @@ Local variables: version-control: t End: */ + +#include "config/i386/i386-tune.h" -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] 02/02: Add support for -mcost=iamcu

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/tune/cost-sched in repository gcc. commit 74060e1dc6233d6fea5cc49a54468a7c675170d8 Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Thu Jul 9 10:53:05 2015 -0700 Add support for -mcost=iamcu --- gcc/config/i386/i386-tune.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/config/i386/i386-tune.c b/gcc/config/i386/i386-tune.c index 9cf702c..d4261a0 100644 --- a/gcc/config/i386/i386-tune.c +++ b/gcc/config/i386/i386-tune.c @@ -93,6 +93,8 @@ x86_tune_options (void) ix86_cost = &atom_cost; else if (strcmp (x86_cost_string, "slm") == 0) ix86_cost = &slm_cost; + else if (strcmp (x86_cost_string, "iamcu") == 0) + ix86_cost = &iamcu_cost; else if (strcmp (x86_cost_string, "generic") == 0) ix86_cost = &generic_cost; else if (strcmp (x86_cost_string, "core") == 0) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] branch trunk updated (75c3f23 -> 853a01d)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch trunk in repository gcc. from 75c3f23 * genmatch.c (fprintf_indent): New function. (operand::gen_transform): Add indent parameter. (expr::gen_transform, c_expr::gen_transform, capture::gen_transform): Ditto and use fprintf_indent. (dt_node::gen, dt_node::gen_kids, dt_node::gen_kids_1): Ditto. (dt_operand::gen, dt_operand::gen_predicate, dt_operand::gen_match_op, dt_operand::gen_gimple_expr, dt_operand::gen_generic_expr, dt_simplify::gen): Ditto. (decision_tree::gen_gimple): Adjust calls and inde [...] new 853a01d 2015-07-09 Vladimir Makarov <vmakarov(a)redhat.com> The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 11 +++++++++++ gcc/lra-constraints.c | 18 +++++++++++++++--- gcc/lra-int.h | 8 +++++--- gcc/lra-lives.c | 15 ++++++++++++++- gcc/lra.c | 7 +++++-- 5 files changed, 50 insertions(+), 9 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] branch trunk updated (e14647a -> 75c3f23)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch trunk in repository gcc. from e14647a 2015-07-09 Paolo Carlini <paolo.carlini(a)oracle.com> new 651c1bd PR target/66814 * config/i386/predicates.md (nonimmediate_gr_operand): New predicate. * config/i386/i386.md (not peephole2): Use nonimmediate_gr_operand. (varous peephole2s): Use {GENERAL,SSE,MMX}_REGNO_P instead of {GENERAL_SSE_MMX}_REG_P where appropriate. new 75c3f23 * genmatch.c (fprintf_indent): New function. (operand::gen_transform): Add indent parameter. (expr::gen_transform, c_expr::gen_transform, capture::gen_transform): Ditto and use fprintf_indent. (dt_node::gen, dt_node::gen_kids, dt_node::gen_kids_1): Ditto. (dt_operand::gen, dt_operand::gen_predicate, dt_operand::gen_match_op, dt_operand::gen_gimple_expr, dt_operand::gen_generic_expr, dt_simplify::gen): Ditto. (decision_tree::gen_gimple): Adjust calls and inde [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 25 +- gcc/config/i386/i386.md | 13 +- gcc/config/i386/predicates.md | 6 + gcc/genmatch.c | 648 +++++++++++++++++++------------- gcc/testsuite/ChangeLog | 5 + gcc/testsuite/gcc.target/i386/pr66814.c | 4 + 6 files changed, 439 insertions(+), 262 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr66814.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

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Tcwg-commits July 2015