Tcwg-commits July 2015

tcwg-commits@lists.linaro.org

2 participants
1355 discussions

[gcc] branch master updated (3311dd0 -> d040a5b)

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9 years, 4 months

[gcc] 07/09: Skip error_mark_node type decls

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/iamcu/improve in repository gcc. commit 454609b389253a5b8126c4c4262d2dd1bfe26127 Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Wed Jul 8 08:28:03 2015 -0700 Skip error_mark_node type decls There is no need to finalize error_mark_node type decls. gcc/ PR target/66810 * cgraphbuild.c (pass_build_cgraph_edges::execute): Skip error_mark_node type decls. gcc/testsuite/ PR target/66810 * gcc.target/i386/pr66810.c: New test. --- gcc/cgraphbuild.c | 3 ++- gcc/testsuite/gcc.target/i386/pr66810.c | 10 ++++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/gcc/cgraphbuild.c b/gcc/cgraphbuild.c index 7d2d096..4d679d9 100644 --- a/gcc/cgraphbuild.c +++ b/gcc/cgraphbuild.c @@ -381,7 +381,8 @@ pass_build_cgraph_edges::execute (function *fun) FOR_EACH_LOCAL_DECL (fun, ix, decl) if (TREE_CODE (decl) == VAR_DECL && (TREE_STATIC (decl) && !DECL_EXTERNAL (decl)) - && !DECL_HAS_VALUE_EXPR_P (decl)) + && !DECL_HAS_VALUE_EXPR_P (decl) + && TREE_TYPE (decl) != error_mark_node) varpool_node::finalize_decl (decl); record_eh_tables (node, fun); diff --git a/gcc/testsuite/gcc.target/i386/pr66810.c b/gcc/testsuite/gcc. [...] new file mode 100644 index 0000000..4778b37 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66810.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-mno-sse -mno-mmx -miamcu" } */ + +int vv; + +void +i (void) +{ + static int a[vv]; /* { dg-error "storage size" } */ +} -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] 02/09: Allow software FP SFmode in FP splitter

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/iamcu/improve in repository gcc. commit c81ff550d3381bcae5c5293af1b52887c0b1f234 Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Thu Jul 9 12:06:40 2015 -0700 Allow software FP SFmode in FP splitter ix86_split_long_move can optimize floating point constant move, which can be used to optimize SFmode move with software floating point. gcc/ PR target/66824 * config/i386/i386.c (ix86_split_to_parts): Allow SFmode move without 387, MMX nor SSE. (ix86_split_long_move): Support single move. * config/i386/i386.md (FP splitter): Allow SFmode without 387, MMX nor SSE. gcc/testsuite/ PR target/66824 * gcc.target/i386/pr66824.c: New test. --- gcc/config/i386/i386.c | 18 +++++++++++++++++- gcc/config/i386/i386.md | 6 +++++- gcc/testsuite/gcc.target/i386/pr66824.c | 29 +++++++++++++++++++++++++++++ 3 files changed, 51 insertions(+), 2 deletions(-) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 785990a..57b8acc 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -22745,7 +22745,13 @@ ix86_split_to_parts (rtx operand, rtx *parts, ma [...] size = (GET_MODE_SIZE (mode) + 4) / 8; gcc_assert (!REG_P (operand) || !MMX_REGNO_P (REGNO (operand))); - gcc_assert (size >= 2 && size <= 4); + /* For software floating point, we also optimize SFmode move. */ + gcc_assert ((size >= 2 + || (mode == SFmode + && !TARGET_80387 + && !TARGET_MMX + && !TARGET_SSE)) + && size <= 4); /* Optimize constant pool reference to immediates. This is used by fp moves, that force all constants to memory to allow combining. */ @@ -22823,10 +22829,14 @@ ix86_split_to_parts (rtx operand, rtx *parts, m [...] case DFmode: REAL_VALUE_TO_TARGET_DOUBLE (r, l); break; + case SFmode: + REAL_VALUE_TO_TARGET_SINGLE (r, l[0]); + goto part0; default: gcc_unreachable (); } parts[1] = gen_int_mode (l[1], SImode); +part0: parts[0] = gen_int_mode (l[0], SImode); } else @@ -22933,6 +22943,12 @@ ix86_split_long_move (rtx operands[]) nparts = ix86_split_to_parts (operands[1], part[1], GET_MODE (operands[0])); ix86_split_to_parts (operands[0], part[0], GET_MODE (operands[0])); + if (nparts == 1) + { + emit_move_insn (part[0][0], part[1][0]); + return; + } + /* When emitting push, take care for source operands on the stack. */ if (push && MEM_P (operands[1]) && reg_overlap_mentioned_p (stack_pointer_rtx, operands[1])) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 1d43aaf..11e3a81 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3507,7 +3507,11 @@ "reload_completed && (GET_MODE (operands[0]) == TFmode || GET_MODE (operands[0]) == XFmode - || GET_MODE (operands[0]) == DFmode) + || GET_MODE (operands[0]) == DFmode + || (GET_MODE (operands[0]) == SFmode + && !TARGET_80387 + && !TARGET_MMX + && !TARGET_SSE)) && !(ANY_FP_REG_P (operands[0]) || ANY_FP_REG_P (operands[1]))" [(const_int 0)] "ix86_split_long_move (operands); DONE;") diff --git a/gcc/testsuite/gcc.target/i386/pr66824.c b/gcc/testsuite/gcc. [...] new file mode 100644 index 0000000..3511e4c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66824.c @@ -0,0 +1,29 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-O2 -mno-sse -mno-mmx -mno-80387" } */ +/* { dg-final { scan-assembler-not "\.LC\[0-9\]" } } */ + +double foo (float); + +double +f1 (void) +{ + return foo (1.0); +} + +double +f2 (void) +{ + return foo (0.0); +} + +void +f3 (float *x, float t) +{ + *x = 0.0 + t; +} + +float +f4 (void) +{ + return 1.0; +} -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] 08/09: Skip incompatible tests on IA MCU target

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/iamcu/improve in repository gcc. commit d5b462afba04260e570a295d47390273a617ece6 Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Wed Jul 8 04:55:05 2015 -0700 Skip incompatible tests on IA MCU target --- gcc/testsuite/gcc.target/i386/i386.exp | 92 +++++++++++++++++++++++++++++++++- 1 file changed, 90 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.target/i386/i386.exp b/gcc/testsuite/gcc.t [...] index 8ca6c51..1b4657d 100644 --- a/gcc/testsuite/gcc.target/i386/i386.exp +++ b/gcc/testsuite/gcc.target/i386/i386.exp @@ -394,7 +394,12 @@ global runtests # Special case compilation of vect-args.c so we don't have to # replicate it 16 times. if [runtest_file_p $runtests $srcdir/$subdir/vect-args.c] { - foreach type { "" -mmmx -m3dnow -msse -msse2 -mavx -mavx2 -mavx512f } { + if { [istarget *-*-elfiamcu] } then { + set types { "" } + } else { + set types { "" -mmmx -m3dnow -msse -msse2 -mavx -mavx2 -mavx512f } + } + foreach type $types { foreach level { "" -O } { set flags "$type $level" verbose -log "Testing vect-args, $flags" 1 @@ -405,7 +410,90 @@ if [runtest_file_p $runtests $srcdir/$subdir/vect-args.c] { # Everything else. set tests [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] -set tests [prune $tests $srcdir/$subdir/vect-args.c] +set all_tests [prune $tests $srcdir/$subdir/vect-args.c] +if { [istarget *-*-elfiamcu] } then { + # Skip tests which are incompatible with Intel MCU. + set tests {} + foreach t $all_tests { + if { [string match "$srcdir/$subdir/20001127-1.c" $t] \ + || [string match "$srcdir/$subdir/20080723-1.c" $t] \ + || [string match "$srcdir/$subdir/980226-1.c" $t] \ + || [string match "$srcdir/$subdir/980414-1.c" $t] \ + || [string match "$srcdir/$subdir/addr-sel-1.c" $t] \ + || [string match "$srcdir/$subdir/incoming-5.c" $t] \ + || [string match "$srcdir/$subdir/mcount_pic.c" $t] \ + || [string match "$srcdir/$subdir/pause-2.c" $t] \ + || [string match "$srcdir/$subdir/pow-1.c" $t] \ + || [string match "$srcdir/$subdir/pr30848.c" $t] \ + || [string match "$srcdir/$subdir/pr45296.c" $t] \ + || [string match "$srcdir/$subdir/pr57736.c" $t] \ + || [string match "$srcdir/$subdir/pr57848.c" $t] \ + || [string match "$srcdir/$subdir/pr58048.c" $t] \ + || [string match "$srcdir/$subdir/pr66047.c" $t] \ + || [string match "$srcdir/$subdir/sibcall-6.c" $t] \ + || [string match "$srcdir/$subdir/sse-5.c" $t] \ + || [string match "$srcdir/$subdir/aggregate-ret*.c" $t] \ + || [string match "$srcdir/$subdir/avx*.c" $t] \ + || [string match "$srcdir/$subdir/funcspec-*.c" $t] \ + || [string match "$srcdir/$subdir/long-double-*.c" $t] \ + || [string match "$srcdir/$subdir/pr57756*.c" $t] \ + || [string match "$srcdir/$subdir/pr59390*.c" $t] \ + || [string match "$srcdir/$subdir/pr59794-*.c" $t] \ + || [string match "$srcdir/$subdir/pr60205-*.c" $t] \ + || [string match "$srcdir/$subdir/pr61925-*.c" $t] } { + continue + } + set options [dg-get-options $t] + if { ! [string match "*-mmmx*" $options] \ + && ! [string match "*-m3dnow*" $options] \ + && ! [string match "*-msse*" $options] \ + && ! [string match "*-mssse*" $options] \ + && ! [string match "*-mavx*" $options] \ + && ! [string match "*-madx*" $options] \ + && ! [string match "*-maes*" $options] \ + && ! [string match "*-mbmi*" $options] \ + && ! [string match "*-mclflushopt*" $options] \ + && ! [string match "*-mclwb*" $options] \ + && ! [string match "*-mf16c*" $options] \ + && ! [string match "*-mfma*" $options] \ + && ! [string match "*-mfxsr*" $options] \ + && ! [string match "*-mhle*" $options] \ + && ! [string match "*-mlzcnt*" $options] \ + && ! [string match "*-mmwaitx*" $options] \ + && ! [string match "*-mpclmul*" $options] \ + && ! [string match "*-mpcommit*" $options] \ + && ! [string match "*-mprefetchwt1*" $options] \ + && ! [string match "*-mprfchw*" $options] \ + && ! [string match "*-mrdrnd*" $options] \ + && ! [string match "*-mrdseed*" $options] \ + && ! [string match "*-mrtm*" $options] \ + && ! [string match "*-msha*" $options] \ + && ! [string match "*-mtbm*" $options] \ + && ! [string match "*-mxop*" $options] \ + && ! [string match "*-mxsave*" $options] \ + && ! [string match "*-mvzeroupper*" $options] \ + && ! [string match "*-march=i686*" $options] \ + && ! [string match "*-march=atom*" $options] \ + && ! [string match "*-march=core*" $options] \ + && ! [string match "*-march=nocona*" $options] \ + && ! [string match "*-march=pentium*" $options] \ + && ! [string match "*-march=amdfam10*" $options] \ + && ! [string match "*-march=athlon*" $options] \ + && ! [string match "*-march=barcelona*" $options] \ + && ! [string match "*-march=bdver*" $options] \ + && ! [string match "*-march=k6*" $options] \ + && ! [string match "*-march=k8*" $options] \ + && ! [string match "*-march=opteron*" $options] \ + && ! [string match "*-march=x86-64*" $options] \ + && ! [string match "*-march=native*" $options] \ + && ! [string match "*-mfpmath=*" $options] \ + && ! [string match "*-mregparm=*" $options] } { + lappend tests $t + } + } +} else { + set tests $all_tests +} # Main loop. dg-runtest $tests "" $DEFAULT_CFLAGS -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] 09/09: IA MCU run-time doesn't support TLS

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/iamcu/improve in repository gcc. commit 489ea5c50607a59f5cec57b765f1a4fd4df662d1 Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Wed Jul 8 19:46:43 2015 -0700 IA MCU run-time doesn't support TLS Return 0 in check_effective_target_tls_native and check_effective_target_tls_emulated for IA MCU target. --- gcc/testsuite/lib/target-supports.exp | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/ta [...] index 1988301..c97fa08 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -701,8 +701,9 @@ proc check_effective_target_tls {} { proc check_effective_target_tls_native {} { # VxWorks uses emulated TLS machinery, but with non-standard helper - # functions, so we fail to automatically detect it. - if { [istarget *-*-vxworks*] } { + # functions, so we fail to automatically detect it. IA MCU run-time + # doesn't support TLS. + if { [istarget *-*-vxworks*] || [istarget *-*-elfiamcu] } { return 0 } @@ -716,6 +717,11 @@ proc check_effective_target_tls_native {} { # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise. proc check_effective_target_tls_emulated {} { + # IA MCU run-time doesn't support TLS. + if { [istarget *-*-elfiamcu] } { + return 0 + } + # VxWorks uses emulated TLS machinery, but with non-standard helper # functions, so we fail to automatically detect it. if { [istarget *-*-vxworks*] } { -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] 03/09: Allow indirect sibcall with register arguments

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/iamcu/improve in repository gcc. commit a542f8fee979f1193aa462616402f5dd15338676 Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Wed Jul 8 21:10:25 2015 -0700 Allow indirect sibcall with register arguments Indirect sibcall with register arguments is OK when there is register available for argument passing. gcc/ PR target/66819 * config/i386/i386.c (ix86_function_ok_for_sibcall): Allow indirect sibcall with register arguments if register available for argument passing. (init_cumulative_args): Set cfun->machine->arg_reg_available_p to cum->nregs != 0. (function_arg_advance_32): Set cfun->machine->arg_reg_available_p to 0 when setting cum->nregs = 0. * config/i386/i386.h (machine_function): Add arg_reg_available_p. gcc/testsuite/ PR target/66819 * gcc.target/i386/pr66819-1.c: New test. * gcc.target/i386/pr66819-2.c: Likewise. * gcc.target/i386/pr66819-3.c: Likewise. * gcc.target/i386/pr66819-4.c: Likewise. * gcc.target/i386/pr66819-5.c: Likewise. --- gcc/config/i386/i386.c | 15 +++++++++------ gcc/config/i386/i386.h | 3 +++ gcc/testsuite/gcc.target/i386/pr66819-1.c | 8 ++++++++ gcc/testsuite/gcc.target/i386/pr66819-2.c | 8 ++++++++ gcc/testsuite/gcc.target/i386/pr66819-3.c | 10 ++++++++++ gcc/testsuite/gcc.target/i386/pr66819-4.c | 12 ++++++++++++ gcc/testsuite/gcc.target/i386/pr66819-5.c | 10 ++++++++++ 7 files changed, 60 insertions(+), 6 deletions(-) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 57b8acc..9cbc6be 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -5629,12 +5629,12 @@ ix86_function_ok_for_sibcall (tree decl, tree exp) if (!decl || (TARGET_DLLIMPORT_DECL_ATTRIBUTES && DECL_DLLIMPORT_P (decl))) { - if (ix86_function_regparm (type, NULL) >= 3) - { - /* ??? Need to count the actual number of registers to be used, - not the possible number of registers. Fix later. */ - return false; - } + /* FIXME: The symbol indirect call doesn't need a + call-clobbered register. But we don't know if + this is a symbol indirect call or not here. */ + if (ix86_function_regparm (type, NULL) >= 3 + && !cfun->machine->arg_reg_available_p) + return false; } } @@ -6568,6 +6568,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, /* Arg [...] ? X86_64_REGPARM_MAX : X86_64_MS_REGPARM_MAX); } + cfun->machine->arg_reg_available_p = cum->nregs != 0; if (TARGET_SSE) { cum->sse_nregs = SSE_REGPARM_MAX; @@ -6637,6 +6638,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, /* Arg [...] else cum->nregs = ix86_function_regparm (fntype, fndecl); } + cfun->machine->arg_reg_available_p = cum->nregs != 0; /* Set up the number of SSE registers used for passing SFmode and DFmode arguments. Warn for mismatching ABI. */ @@ -7585,6 +7587,7 @@ pass_in_reg: { cum->nregs = 0; cum->regno = 0; + cfun->machine->arg_reg_available_p = 0; } break; diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 74334ff..0b6e304 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2479,6 +2479,9 @@ struct GTY(()) machine_function { /* If true, it is safe to not save/restore DRAP register. */ BOOL_BITFIELD no_drap_save_restore : 1; + /* If true, there is register available for argument passing. */ + BOOL_BITFIELD arg_reg_available_p : 1; + /* During prologue/epilogue generation, the current frame state. Otherwise, the frame state at the end of the prologue. */ struct machine_frame_state fs; diff --git a/gcc/testsuite/gcc.target/i386/pr66819-1.c b/gcc/testsuite/gc [...] new file mode 100644 index 0000000..7c8a1ab --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66819-1.c @@ -0,0 +1,8 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-O2 -mregparm=3" } */ +/* { dg-final { scan-assembler-not "call" } } */ + +void foo(void (*bar)(void)) +{ + bar(); +} diff --git a/gcc/testsuite/gcc.target/i386/pr66819-2.c b/gcc/testsuite/gc [...] new file mode 100644 index 0000000..9de4f97 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66819-2.c @@ -0,0 +1,8 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-fPIC -O2 -mregparm=3" } */ +/* { dg-final { scan-assembler-not "call" } } */ + +void foo(void (*bar)(void)) +{ + bar(); +} diff --git a/gcc/testsuite/gcc.target/i386/pr66819-3.c b/gcc/testsuite/gc [...] new file mode 100644 index 0000000..3bc5a34 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66819-3.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-O2 -mregparm=3" } */ +/* { dg-final { scan-assembler-not "call" } } */ + +void (*bar)(int, int); + +void foo(int i, int j) +{ + bar(i, j); +} diff --git a/gcc/testsuite/gcc.target/i386/pr66819-4.c b/gcc/testsuite/gc [...] new file mode 100644 index 0000000..18b2ccf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66819-4.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-O2 -mregparm=3" } */ +/* { dg-final { scan-assembler-not "call" } } */ + +#include <stdarg.h> + +void (*bar)(int, va_list); + +void foo(int i, va_list args) +{ + bar(i, args); +} diff --git a/gcc/testsuite/gcc.target/i386/pr66819-5.c b/gcc/testsuite/gc [...] new file mode 100644 index 0000000..6b019d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66819-5.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-O2 -mregparm=3" } */ +/* { dg-final { scan-assembler "call" } } */ + +void (*bar)(int, int, int); + +void foo(int i, int j, int k) +{ + bar(i, j, k); +} -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] 04/09: Turn off X86_TUNE_ZERO_EXTEND_WITH_AND for IA MCU

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/iamcu/improve in repository gcc. commit fceb8950b4dfc775fcf46d4eecf7b9884ef67cbf Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Thu Jul 9 18:42:45 2015 -0700 Turn off X86_TUNE_ZERO_EXTEND_WITH_AND for IA MCU --- gcc/config/i386/x86-tune.def | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 42a560b..eb271b8 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -448,7 +448,7 @@ DEF_TUNE (X86_TUNE_SHIFT1, "shift1", ~m_486) /* X86_TUNE_ZERO_EXTEND_WITH_AND: Use AND instruction instead of mozbl/movwl. */ DEF_TUNE (X86_TUNE_ZERO_EXTEND_WITH_AND, "zero_extend_with_and", - m_486 | m_PENT | m_IAMCU) + m_486 | m_PENT) /* X86_TUNE_PROMOTE_HIMODE_IMUL: Modern CPUs have same latency for HImode and SImode multiply, but 386 and 486 do HImode multiply faster. */ -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] 06/09: Turn off loop and funcion alignments for IA MCU

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/iamcu/improve in repository gcc. commit 8f38d6624ae4b7aec348fe5b50526065cc15aaa8 Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Fri Jul 10 04:05:53 2015 -0700 Turn off loop and funcion alignments for IA MCU --- gcc/config/i386/i386.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 9cbc6be..f01cb3a 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -2557,7 +2557,7 @@ static const struct ptt processor_target_table[PROC [...] {"i386", &i386_cost, 4, 3, 4, 3, 4}, {"i486", &i486_cost, 16, 15, 16, 15, 16}, {"pentium", &pentium_cost, 16, 7, 16, 7, 16}, - {"iamcu", &iamcu_cost, 16, 7, 16, 7, 16}, + {"iamcu", &iamcu_cost, 0, 0, 0, 0, 0}, {"pentiumpro", &pentiumpro_cost, 16, 15, 16, 10, 16}, {"pentium4", &pentium4_cost, 0, 0, 0, 0, 0}, {"nocona", &nocona_cost, 0, 0, 0, 0, 0}, -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] 05/09: Turn on X86_TUNE_USE_BT for IA MCU

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/iamcu/improve in repository gcc. commit 3ddc2df06ad08ea7b463a020ddf7c7c7903cb7ce Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Thu Jul 9 18:51:01 2015 -0700 Turn on X86_TUNE_USE_BT for IA MCU --- gcc/config/i386/x86-tune.def | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index eb271b8..6d65ca8 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -292,7 +292,7 @@ DEF_TUNE (X86_TUNE_USE_CLTD, "use_cltd", /* X86_TUNE_USE_BT: Enable use of BT (bit test) instructions. */ DEF_TUNE (X86_TUNE_USE_BT, "use_bt", m_CORE_ALL | m_BONNELL | m_SILVERMONT | m_KNL | m_INTEL - | m_AMD_MULTIPLE | m_GENERIC) + | m_IAMCU | m_AMD_MULTIPLE | m_GENERIC) /*****************************************************************************/ /* 387 instruction selection tuning */ -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 4 months

[gcc] branch hjl/iamcu/improve updated (985b5b7 -> 489ea5c)

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Tcwg-commits July 2015