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from 1f7a324 PR libstdc++/68448 * python/hook.in: Call register_libstdcx [...]
new 82e7617 PR middle-end/68339 * omp-low.c (expand_simd_clones): Call [...]
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gcc/ChangeLog | 6 ++++++
gcc/omp-low.c | 4 ++++
gcc/testsuite/ChangeLog | 5 +++++
gcc/testsuite/gcc.dg/vect/pr68339.c | 17 +++++++++++++++++
4 files changed, 32 insertions(+)
create mode 100644 gcc/testsuite/gcc.dg/vect/pr68339.c
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from e14f165 compiler: Use receiver name in hash/equal for type within [...]
new 1f7a324 PR libstdc++/68448 * python/hook.in: Call register_libstdcx [...]
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libstdc++-v3/ChangeLog | 7 +++++++
libstdc++-v3/python/hook.in | 5 ++++-
libstdc++-v3/python/libstdcxx/v6/__init__.py | 15 ++++++++-------
3 files changed, 19 insertions(+), 8 deletions(-)
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unknown user pushed a change to branch master
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from 10efd28 Fix cygwin performance loss on linpack.
new 073ddf1 PR libstdc++/68448 * python/hook.in: Call register_libstdcx [...]
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libstdc++-v3/ChangeLog | 9 ++++++++-
libstdc++-v3/python/hook.in | 5 ++++-
libstdc++-v3/python/libstdcxx/v6/__init__.py | 15 ++++++++-------
3 files changed, 20 insertions(+), 9 deletions(-)
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from b2bcff1 [AArch64] Add attribute for compatibility with ARM pipeline models
new 10efd28 Fix cygwin performance loss on linpack.
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gcc/ChangeLog | 4 ++++
gcc/tree-vect-data-refs.c | 2 ++
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from 01f1111 * c-common.c (shorten_compare): But look through macros from [...]
new b2bcff1 [AArch64] Add attribute for compatibility with ARM pipeline models
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gcc/ChangeLog | 6 ++++++
gcc/config/aarch64/aarch64.md | 4 ++++
gcc/config/arm/arm.md | 3 +++
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from 8fe38eb [ARM] Do not expand movmisalign pattern if not in 32-bit mode
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gcc/c-family/ChangeLog | 5 +++++
gcc/c-family/c-common.c | 6 ++++--
gcc/testsuite/gcc.dg/Wtype-limits2.c | 12 ++++++++++++
3 files changed, 21 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.dg/Wtype-limits2.c
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from 9028c8f [ARM] PR 68149 Fix ICE in unaligned_loaddi split
new 8fe38eb [ARM] Do not expand movmisalign pattern if not in 32-bit mode
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gcc/ChangeLog | 11 +++++++++++
gcc/config/arm/arm.c | 5 +++--
gcc/config/arm/arm.md | 10 +++++-----
gcc/testsuite/ChangeLog | 4 ++++
.../gcc.target/arm/armv6-unaligned-load-ice.c | 18 ++++++++++++++++++
5 files changed, 41 insertions(+), 7 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
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