Current only one entry is enabled but IP itself is using 4 different IDs which are already listed in zynqmp.dtsi.
sata: ahci@fd0c0000 { compatible = "ceva,ahci-1v84"; ... iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, <&smmu 0x4c2>, <&smmu 0x4c3>; };
Fixes: 8ac47837f0e0 ("arm64: dts: zynqmp: Add missing iommu IDs") Cc: stable@vger.kernel.org # v5.12+ Signed-off-by: Michal Simek michal.simek@amd.com Acked-by: Krzysztof Kozlowski krzysztof.kozlowski@linaro.org ---
Changes in v2: - Added Krzysztof ack - Add stable tags reported by Damien Le Moal
Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml b/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml index 9b31f864e071..71364c6081ff 100644 --- a/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml +++ b/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml @@ -32,7 +32,7 @@ properties: maxItems: 1
iommus: - maxItems: 1 + maxItems: 4
power-domains: maxItems: 1
On 5/12/23 20:52, Michal Simek wrote:
Current only one entry is enabled but IP itself is using 4 different IDs which are already listed in zynqmp.dtsi.
sata: ahci@fd0c0000 { compatible = "ceva,ahci-1v84"; ... iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, <&smmu 0x4c2>, <&smmu 0x4c3>; };
Fixes: 8ac47837f0e0 ("arm64: dts: zynqmp: Add missing iommu IDs") Cc: stable@vger.kernel.org # v5.12+ Signed-off-by: Michal Simek michal.simek@amd.com Acked-by: Krzysztof Kozlowski krzysztof.kozlowski@linaro.org
Applied to for-6.4-fixes. Thanks !
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