Existing genphy_loopback() is not applicable for Marvell PHY. Besides configuring bit-6 and bit-13 in Page 0 Register 0 (Copper Control Register), it is also required to configure same bits in Page 2 Register 21 (MAC Specific Control Register 2) according to speed of the loopback is operating.
Tested working on Marvell88E1510 PHY for all speeds (1000/100/10Mbps).
FIXME: Based on trial and error test, it seem 1G need to have delay between soft reset and loopback enablement.
Fixes: 014068dcb5b1 ("net: phy: genphy_loopback: add link speed configuration") Cc: stable@vger.kernel.org # 5.15.x Signed-off-by: Mohammad Athari Bin Ismail mohammad.athari.ismail@intel.com --- v3 changelog: - Use phy_write() to configure speed for BMCR. - Add error handling. All commented by Russell King linux@armlinux.org.uk
v2 changelog: - For loopback enabled, add bit-6 and bit-13 configuration in both Page 0 Register 0 and Page 2 Register 21. Commented by Heiner Kallweit hkallweit1@gmail.com. - For loopback disabled, follow genphy_loopback() implementation --- drivers/net/phy/marvell.c | 56 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 4fcfca4e1702..5c371c2de9a0 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -189,6 +189,8 @@ #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
+#define MII_88E1510_MSCR_2 0x15 + #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10 #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11 #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12 @@ -1932,6 +1934,58 @@ static void marvell_get_stats(struct phy_device *phydev, data[i] = marvell_get_stat(phydev, i); }
+static int marvell_loopback(struct phy_device *phydev, bool enable) +{ + int err; + + if (enable) { + u16 bmcr_ctl = 0, mscr2_ctl = 0; + + if (phydev->speed == SPEED_1000) + bmcr_ctl = BMCR_SPEED1000; + else if (phydev->speed == SPEED_100) + bmcr_ctl = BMCR_SPEED100; + + if (phydev->duplex == DUPLEX_FULL) + bmcr_ctl |= BMCR_FULLDPLX; + + err = phy_write(phydev, MII_BMCR, bmcr_ctl); + if (err < 0) + return err; + + if (phydev->speed == SPEED_1000) + mscr2_ctl = BMCR_SPEED1000; + else if (phydev->speed == SPEED_100) + mscr2_ctl = BMCR_SPEED100; + + err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, + MII_88E1510_MSCR_2, BMCR_SPEED1000 | + BMCR_SPEED100, mscr2_ctl); + if (err < 0) + return err; + + /* Need soft reset to have speed configuration takes effect */ + err = genphy_soft_reset(phydev); + if (err < 0) + return err; + + /* FIXME: Based on trial and error test, it seem 1G need to have + * delay between soft reset and loopback enablement. + */ + if (phydev->speed == SPEED_1000) + msleep(1000); + + return phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, + BMCR_LOOPBACK); + } else { + err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0); + if (err < 0) + return err; + + return phy_config_aneg(phydev); + } +} + static int marvell_vct5_wait_complete(struct phy_device *phydev) { int i; @@ -3078,7 +3132,7 @@ static struct phy_driver marvell_drivers[] = { .get_sset_count = marvell_get_sset_count, .get_strings = marvell_get_strings, .get_stats = marvell_get_stats, - .set_loopback = genphy_loopback, + .set_loopback = marvell_loopback, .get_tunable = m88e1011_get_tunable, .set_tunable = m88e1011_set_tunable, .cable_test_start = marvell_vct7_cable_test_start,
On 13.01.2022 10:56, Mohammad Athari Bin Ismail wrote:
Existing genphy_loopback() is not applicable for Marvell PHY. Besides configuring bit-6 and bit-13 in Page 0 Register 0 (Copper Control Register), it is also required to configure same bits in Page 2 Register 21 (MAC Specific Control Register 2) according to speed of the loopback is operating.
Tested working on Marvell88E1510 PHY for all speeds (1000/100/10Mbps).
FIXME: Based on trial and error test, it seem 1G need to have delay between soft reset and loopback enablement.
Fixes: 014068dcb5b1 ("net: phy: genphy_loopback: add link speed configuration") Cc: stable@vger.kernel.org # 5.15.x Signed-off-by: Mohammad Athari Bin Ismail mohammad.athari.ismail@intel.com
v3 changelog:
- Use phy_write() to configure speed for BMCR.
- Add error handling.
All commented by Russell King linux@armlinux.org.uk
v2 changelog:
- For loopback enabled, add bit-6 and bit-13 configuration in both Page 0 Register 0 and Page 2 Register 21. Commented by Heiner Kallweit
- For loopback disabled, follow genphy_loopback() implementation
drivers/net/phy/marvell.c | 56 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 4fcfca4e1702..5c371c2de9a0 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -189,6 +189,8 @@ #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ +#define MII_88E1510_MSCR_2 0x15
#define MII_VCT5_TX_RX_MDI0_COUPLING 0x10 #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11 #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12 @@ -1932,6 +1934,58 @@ static void marvell_get_stats(struct phy_device *phydev, data[i] = marvell_get_stat(phydev, i); } +static int marvell_loopback(struct phy_device *phydev, bool enable)
Marvell PHY's use different bits for the loopback speed, e.g.:
88E1510 bits 13, 6 88E1545 bits 2..0
Your function is usable with certain Marvell PHY's only, therefore the function name is misleading. At a first glance I see two options:
1. Leave the function name and add a version-specific section that returns an error for (not yet) supported versions. 2. Name it m88e1510_loopback()
+{
- int err;
- if (enable) {
u16 bmcr_ctl = 0, mscr2_ctl = 0;if (phydev->speed == SPEED_1000)bmcr_ctl = BMCR_SPEED1000;else if (phydev->speed == SPEED_100)bmcr_ctl = BMCR_SPEED100;if (phydev->duplex == DUPLEX_FULL)bmcr_ctl |= BMCR_FULLDPLX;err = phy_write(phydev, MII_BMCR, bmcr_ctl);if (err < 0)return err;if (phydev->speed == SPEED_1000)mscr2_ctl = BMCR_SPEED1000;else if (phydev->speed == SPEED_100)mscr2_ctl = BMCR_SPEED100;err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,MII_88E1510_MSCR_2, BMCR_SPEED1000 |BMCR_SPEED100, mscr2_ctl);if (err < 0)return err;/* Need soft reset to have speed configuration takes effect */err = genphy_soft_reset(phydev);if (err < 0)return err;/* FIXME: Based on trial and error test, it seem 1G need to have* delay between soft reset and loopback enablement.*/if (phydev->speed == SPEED_1000)msleep(1000);return phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,BMCR_LOOPBACK);- } else {
err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);if (err < 0)return err;return phy_config_aneg(phydev);- }
+}
static int marvell_vct5_wait_complete(struct phy_device *phydev) { int i; @@ -3078,7 +3132,7 @@ static struct phy_driver marvell_drivers[] = { .get_sset_count = marvell_get_sset_count, .get_strings = marvell_get_strings, .get_stats = marvell_get_stats,
.set_loopback = genphy_loopback,
.set_loopback = marvell_loopback,
-----Original Message----- From: Heiner Kallweit hkallweit1@gmail.com Sent: Saturday, January 15, 2022 4:34 AM To: Ismail, Mohammad Athari mohammad.athari.ismail@intel.com; Andrew Lunn andrew@lunn.ch; David S . Miller davem@davemloft.net; Jakub Kicinski kuba@kernel.org; Oleksij Rempel <linux@rempel- privat.de>; Russell King linux@armlinux.org.uk Cc: netdev@vger.kernel.org; linux-kernel@vger.kernel.org; stable@vger.kernel.org Subject: Re: [PATCH net v3] net: phy: marvell: add Marvell specific PHY loopback
On 13.01.2022 10:56, Mohammad Athari Bin Ismail wrote:
Existing genphy_loopback() is not applicable for Marvell PHY. Besides configuring bit-6 and bit-13 in Page 0 Register 0 (Copper Control Register), it is also required to configure same bits in Page 2 Register 21 (MAC Specific Control Register 2) according to speed of the loopback is operating.
Tested working on Marvell88E1510 PHY for all speeds (1000/100/10Mbps).
FIXME: Based on trial and error test, it seem 1G need to have delay between soft reset and loopback enablement.
Fixes: 014068dcb5b1 ("net: phy: genphy_loopback: add link speed configuration") Cc: stable@vger.kernel.org # 5.15.x Signed-off-by: Mohammad Athari Bin Ismail
mohammad.athari.ismail@intel.com
v3 changelog:
- Use phy_write() to configure speed for BMCR.
- Add error handling.
All commented by Russell King linux@armlinux.org.uk
v2 changelog:
- For loopback enabled, add bit-6 and bit-13 configuration in both Page 0 Register 0 and Page 2 Register 21. Commented by Heiner Kallweit
- For loopback disabled, follow genphy_loopback() implementation
drivers/net/phy/marvell.c | 56 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 4fcfca4e1702..5c371c2de9a0 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -189,6 +189,8 @@ #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset
*/
+#define MII_88E1510_MSCR_2 0x15
#define MII_VCT5_TX_RX_MDI0_COUPLING 0x10 #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11 #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12 @@ -1932,6 +1934,58 @@ static void marvell_get_stats(struct phy_device
*phydev,
data[i] = marvell_get_stat(phydev, i); }+static int marvell_loopback(struct phy_device *phydev, bool enable)
Marvell PHY's use different bits for the loopback speed, e.g.:
88E1510 bits 13, 6 88E1545 bits 2..0
Thank you for the info.
Your function is usable with certain Marvell PHY's only, therefore the function name is misleading. At a first glance I see two options:
- Leave the function name and add a version-specific section that returns an error for (not yet) supported versions.
- Name it m88e1510_loopback()
I'll go for option 2. Thank you for the suggestion.
-Athari-
+{
- int err;
- if (enable) {
u16 bmcr_ctl = 0, mscr2_ctl = 0;if (phydev->speed == SPEED_1000)bmcr_ctl = BMCR_SPEED1000;else if (phydev->speed == SPEED_100)bmcr_ctl = BMCR_SPEED100;if (phydev->duplex == DUPLEX_FULL)bmcr_ctl |= BMCR_FULLDPLX;err = phy_write(phydev, MII_BMCR, bmcr_ctl);if (err < 0)return err;if (phydev->speed == SPEED_1000)mscr2_ctl = BMCR_SPEED1000;else if (phydev->speed == SPEED_100)mscr2_ctl = BMCR_SPEED100;err = phy_modify_paged(phydev,MII_MARVELL_MSCR_PAGE,
MII_88E1510_MSCR_2, BMCR_SPEED1000|
BMCR_SPEED100, mscr2_ctl);if (err < 0)return err;/* Need soft reset to have speed configuration takes effect*/
err = genphy_soft_reset(phydev);if (err < 0)return err;/* FIXME: Based on trial and error test, it seem 1G need tohave
* delay between soft reset and loopback enablement.*/if (phydev->speed == SPEED_1000)msleep(1000);return phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,BMCR_LOOPBACK);- } else {
err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);if (err < 0)return err;return phy_config_aneg(phydev);- }
+}
static int marvell_vct5_wait_complete(struct phy_device *phydev) { int i; @@ -3078,7 +3132,7 @@ static struct phy_driver marvell_drivers[] = { .get_sset_count = marvell_get_sset_count, .get_strings = marvell_get_strings, .get_stats = marvell_get_stats,
.set_loopback = genphy_loopback,
.set_loopback = marvell_loopback,
linux-stable-mirror@lists.linaro.org
-
Heiner Kallweit -
Ismail, Mohammad Athari -
Mohammad Athari Bin Ismail