On Tue, Dec 3, 2024 at 7:06 PM Eric Biggers ebiggers@kernel.org wrote:

From: Eric Biggers ebiggers@google.com

As QCE is an order of magnitude slower than the ARMv8 Crypto Extensions on the CPU, and is also less well tested, give it a lower priority. Previously the QCE SHA algorithms had higher priority than the ARMv8 CE equivalents, and the ciphers such as AES-XTS had the same priority which meant the QCE versions were chosen if they happened to be loaded later.

Fixes: ec8f5d8f6f76 ("crypto: qce - Qualcomm crypto engine driver") Cc: stable@vger.kernel.org Cc: Bartosz Golaszewski brgl@bgdev.pl Cc: Neil Armstrong neil.armstrong@linaro.org Cc: Thara Gopinath thara.gopinath@gmail.com Signed-off-by: Eric Biggers ebiggers@google.com

---

drivers/crypto/qce/aead.c | 2 +- drivers/crypto/qce/sha.c | 2 +- drivers/crypto/qce/skcipher.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/crypto/qce/aead.c b/drivers/crypto/qce/aead.c index 7d811728f047..97b56e92ea33 100644 --- a/drivers/crypto/qce/aead.c +++ b/drivers/crypto/qce/aead.c @@ -784,11 +784,11 @@ static int qce_aead_register_one(const struct qce_aead_def *def, struct qce_devi alg->encrypt = qce_aead_encrypt; alg->decrypt = qce_aead_decrypt; alg->init = qce_aead_init; alg->exit = qce_aead_exit;

•   alg->base.cra_priority          = 300;
  

•   alg->base.cra_priority          = 275;
    alg->base.cra_flags             = CRYPTO_ALG_ASYNC |
                                      CRYPTO_ALG_ALLOCATES_MEMORY |
                                      CRYPTO_ALG_KERN_DRIVER_ONLY |
                                      CRYPTO_ALG_NEED_FALLBACK;
    alg->base.cra_ctxsize           = sizeof(struct qce_aead_ctx);
  

diff --git a/drivers/crypto/qce/sha.c b/drivers/crypto/qce/sha.c index fc72af8aa9a7..71b748183cfa 100644 --- a/drivers/crypto/qce/sha.c +++ b/drivers/crypto/qce/sha.c @@ -480,11 +480,11 @@ static int qce_ahash_register_one(const struct qce_ahash_def *def, else if (IS_SHA256(def->flags)) tmpl->hash_zero = sha256_zero_message_hash;

    base = &alg->halg.base;
    base->cra_blocksize = def->blocksize;

•   base->cra_priority = 300;
  

•   base->cra_priority = 175;
    base->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
    base->cra_ctxsize = sizeof(struct qce_sha_ctx);
    base->cra_alignmask = 0;
    base->cra_module = THIS_MODULE;
    base->cra_init = qce_ahash_cra_init;
  

diff --git a/drivers/crypto/qce/skcipher.c b/drivers/crypto/qce/skcipher.c index 5b493fdc1e74..ffb334eb5b34 100644 --- a/drivers/crypto/qce/skcipher.c +++ b/drivers/crypto/qce/skcipher.c @@ -459,11 +459,11 @@ static int qce_skcipher_register_one(const struct qce_skcipher_def *def, IS_DES(def->flags) ? qce_des_setkey : qce_skcipher_setkey; alg->encrypt = qce_skcipher_encrypt; alg->decrypt = qce_skcipher_decrypt;

•   alg->base.cra_priority          = 300;
  

•   alg->base.cra_priority          = 275;
    alg->base.cra_flags             = CRYPTO_ALG_ASYNC |
                                      CRYPTO_ALG_ALLOCATES_MEMORY |
                                      CRYPTO_ALG_KERN_DRIVER_ONLY;
    alg->base.cra_ctxsize           = sizeof(struct qce_cipher_ctx);
    alg->base.cra_alignmask         = 0;
  
  

base-commit: ceb8bf2ceaa77fe222fe8fe32cb7789c9099ddf1

2.47.1

Reviewed-by: Bartosz Golaszewski bartosz.golaszewski@linaro.org

But the QCE driver will still be worked on due to features that we want to support that the CE don't have.

Bart