When using uni-planar formats (like RGB), the scaling parameters are stored in plane 0, not plane 1.
Fixes: fc04023fafec ("drm/vc4: Add support for YUV planes.") Cc: stable@vger.kernel.org Signed-off-by: Boris Brezillon boris.brezillon@bootlin.com --- drivers/gpu/drm/vc4/vc4_plane.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index ebf081c7a53b..6831975604b5 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -541,7 +541,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, * the scl fields here. */ if (num_planes == 1) { - scl0 = vc4_get_scl_field(state, 1); + scl0 = vc4_get_scl_field(state, 0); scl1 = scl0; } else { scl0 = vc4_get_scl_field(state, 1);
Boris Brezillon boris.brezillon@bootlin.com writes:
When using uni-planar formats (like RGB), the scaling parameters are stored in plane 0, not plane 1.
Fixes: fc04023fafec ("drm/vc4: Add support for YUV planes.") Cc: stable@vger.kernel.org Signed-off-by: Boris Brezillon boris.brezillon@bootlin.com
Reviewed-by: Eric Anholt eric@anholt.net
Looking at the other branch, did I get the scl0/scl1 backwards? HVS docs say for non-444 YCBCR: "In these cases Channel 0 performs Y/Alpha scaling and Channel 1 performs CB/CR scaling and should be configured as appropriate."
On Mon, 07 May 2018 08:56:14 -0700 Eric Anholt eric@anholt.net wrote:
Boris Brezillon boris.brezillon@bootlin.com writes:
When using uni-planar formats (like RGB), the scaling parameters are stored in plane 0, not plane 1.
Fixes: fc04023fafec ("drm/vc4: Add support for YUV planes.") Cc: stable@vger.kernel.org Signed-off-by: Boris Brezillon boris.brezillon@bootlin.com
Reviewed-by: Eric Anholt eric@anholt.net
Looking at the other branch, did I get the scl0/scl1 backwards? HVS docs say for non-444 YCBCR: "In these cases Channel 0 performs Y/Alpha scaling and Channel 1 performs CB/CR scaling and should be configured as appropriate."
Didn't test, but I think rescaling of multi-planar format is correct.
On Mon, 7 May 2018 18:11:02 +0200 Boris Brezillon boris.brezillon@bootlin.com wrote:
On Mon, 07 May 2018 08:56:14 -0700 Eric Anholt eric@anholt.net wrote:
Boris Brezillon boris.brezillon@bootlin.com writes:
When using uni-planar formats (like RGB), the scaling parameters are stored in plane 0, not plane 1.
Fixes: fc04023fafec ("drm/vc4: Add support for YUV planes.") Cc: stable@vger.kernel.org Signed-off-by: Boris Brezillon boris.brezillon@bootlin.com
Reviewed-by: Eric Anholt eric@anholt.net
Looking at the other branch, did I get the scl0/scl1 backwards? HVS docs say for non-444 YCBCR: "In these cases Channel 0 performs Y/Alpha scaling and Channel 1 performs CB/CR scaling and should be configured as appropriate."
Didn't test, but I think rescaling of multi-planar format is correct.
I just tested, and I confirm the other branch is correct.
On Mon, 7 May 2018 14:13:03 +0200 Boris Brezillon boris.brezillon@bootlin.com wrote:
When using uni-planar formats (like RGB), the scaling parameters are stored in plane 0, not plane 1.
Fixes: fc04023fafec ("drm/vc4: Add support for YUV planes.") Cc: stable@vger.kernel.org Signed-off-by: Boris Brezillon boris.brezillon@bootlin.com
Queued to drm-misc-fixes.
drivers/gpu/drm/vc4/vc4_plane.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index ebf081c7a53b..6831975604b5 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -541,7 +541,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, * the scl fields here. */ if (num_planes == 1) {
scl0 = vc4_get_scl_field(state, 1);
scl1 = scl0; } else { scl0 = vc4_get_scl_field(state, 1);scl0 = vc4_get_scl_field(state, 0);
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