[Public]
On designs that that GPIO controller has a dedicated IRQ, wakeups aren't working properly from s0i3. S0i3 is first supported on 5.14 on AMD, so it's a good idea to fix this there.
This is fixed by the following commits:
commit 7e6f8d6f4a42 ("pinctrl: amd: Add irq field data") # 5.14 commit acd47b9f28e5 ("pinctrl: amd: Handle wake-up interrupt") #5.14
Other designs that the GPIO controller shares the IRQ with the ACPI SCI have other fixes that will be sent to stable once they're in 5.16.
On Wed, Nov 10, 2021 at 11:41:37PM +0000, Limonciello, Mario wrote:
[Public]
On designs that that GPIO controller has a dedicated IRQ, wakeups aren't working properly from s0i3. S0i3 is first supported on 5.14 on AMD, so it's a good idea to fix this there.
This is fixed by the following commits:
commit 7e6f8d6f4a42 ("pinctrl: amd: Add irq field data") # 5.14 commit acd47b9f28e5 ("pinctrl: amd: Handle wake-up interrupt") #5.14
Other designs that the GPIO controller shares the IRQ with the ACPI SCI have other fixes that will be sent to stable once they're in 5.16.
Both now queued up, thanks.
greg k-h
linux-stable-mirror@lists.linaro.org
-
Greg KH -
Limonciello, Mario