Yu,
Regarding your patch to disable AVX with eager fpu disabled in the 4.4 stable queue:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/stable-queue.git/tree...
Why would this be necessary? In the Intel SDM Vol 2, Chapter 2.4, FPU/SIMD instructions are grouped into different classes and for all of them CR0.TS triggers a #NM exception in all modes but real mode and virtual 8086 mode.
It seems to me lazy context switching of AVX is perfectly functional (disregarding the recently disclosed security issue). Am I missing something?
Julian
On Fri, 2018-06-15 at 14:11 +0200, Julian Stecklina wrote:
Yu,
Regarding your patch to disable AVX with eager fpu disabled in the 4.4 stable queue:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/stable-queue.git/tree...
Why would this be necessary? In the Intel SDM Vol 2, Chapter 2.4, FPU/SIMD instructions are grouped into different classes and for all of them CR0.TS triggers a #NM exception in all modes but real mode and virtual 8086 mode.
It seems to me lazy context switching of AVX is perfectly functional (disregarding the recently disclosed security issue). Am I missing something?
Julian
This is for MPX, not AVX.
Yu-cheng
On June 15, 2018 2:14:50 PM UTC, Yu-cheng Yu yu-cheng.yu@intel.com wrote:
On Fri, 2018-06-15 at 14:11 +0200, Julian Stecklina wrote:
Yu,
Regarding your patch to disable AVX with eager fpu disabled in the
4.4
stable queue:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/stable-queue.git/tree...
Why would this be necessary? In the Intel SDM Vol 2, Chapter 2.4, FPU/SIMD instructions are grouped into different classes and for all
of
them CR0.TS triggers a #NM exception in all modes but real mode and virtual 8086 mode.
It seems to me lazy context switching of AVX is perfectly functional (disregarding the recently disclosed security issue). Am I missing something?
Julian
This is for MPX, not AVX.
Wrong link. There was another one for AVX, but I saw it got reverted. Nevermind then. ;)
Julian
linux-stable-mirror@lists.linaro.org