.config_intr() handles only the link event interrupt and should disable/enable the PTP interrupt also.

It's safe to disable/enable the PTP irq even if the egress ts irq is disabled. This interrupt, the PTP one, acts as a global switch for all PTP irqs.

Fixes: 514def5dd339 ("phy: nxp-c45-tja11xx: add timestamping support") CC: stable@vger.kernel.org # 5.15+ Signed-off-by: Radu Pirea (NXP OSS) radu-nicolae.pirea@oss.nxp.com --- drivers/net/phy/nxp-c45-tja11xx.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c index 029875a59ff8..7b213c3f4536 100644 --- a/drivers/net/phy/nxp-c45-tja11xx.c +++ b/drivers/net/phy/nxp-c45-tja11xx.c @@ -63,6 +63,9 @@ #define VEND1_PORT_ABILITIES 0x8046 #define PTP_ABILITY BIT(3)

+#define VEND1_PORT_FUNC_IRQ_EN 0x807A +#define PTP_IRQS BIT(3) + #define VEND1_PORT_INFRA_CONTROL 0xAC00 #define PORT_INFRA_CONTROL_EN BIT(14)

@@ -890,12 +893,20 @@ static int nxp_c45_start_op(struct phy_device *phydev)

static int nxp_c45_config_intr(struct phy_device *phydev) { - if (phydev->interrupts == PHY_INTERRUPT_ENABLED) + /* The return value is ignored on purpose. It might be < 0. + * 0x807A register is not present on SJA1110 PHYs. + */ + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { + phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, + VEND1_PORT_FUNC_IRQ_EN, PTP_IRQS); return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PHY_IRQ_EN, PHY_IRQ_LINK_EVENT); - else + } else { + phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, + VEND1_PORT_FUNC_IRQ_EN, PTP_IRQS); return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PHY_IRQ_EN, PHY_IRQ_LINK_EVENT); + } }

static irqreturn_t nxp_c45_handle_interrupt(struct phy_device *phydev)