Use the correct DSS CTL registers for ICL DSI transcoders.
As a side effect, this also brings back the sanity check for trying to use pipe DSC registers on pipe A on ICL.
Fixes: 8a029c113b17 ("drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave") References: http://lore.kernel.org/r/87eegxq2lq.fsf@intel.com Cc: Manasi Navare manasi.d.navare@intel.com Cc: Animesh Manna animesh.manna@intel.com Cc: Vandita Kulkarni vandita.kulkarni@intel.com Cc: stable@vger.kernel.org # v5.11+ Signed-off-by: Jani Nikula jani.nikula@intel.com
---
Untested, I don't have the platform. --- drivers/gpu/drm/i915/display/intel_vdsc.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index f58cc5700784..a86c57d117f2 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -1014,20 +1014,14 @@ static i915_reg_t dss_ctl1_reg(const struct intel_crtc_state *crtc_state) { enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
- if (crtc_state->cpu_transcoder == TRANSCODER_EDP) - return DSS_CTL1; - - return ICL_PIPE_DSS_CTL1(pipe); + return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL1(pipe) : DSS_CTL1; }
static i915_reg_t dss_ctl2_reg(const struct intel_crtc_state *crtc_state) { enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
- if (crtc_state->cpu_transcoder == TRANSCODER_EDP) - return DSS_CTL2; - - return ICL_PIPE_DSS_CTL2(pipe); + return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL2(pipe) : DSS_CTL2; }
void intel_dsc_enable(struct intel_encoder *encoder,
On Fri, Mar 19, 2021 at 01:53:33PM +0200, Jani Nikula wrote:
Use the correct DSS CTL registers for ICL DSI transcoders.
As a side effect, this also brings back the sanity check for trying to use pipe DSC registers on pipe A on ICL.
Fixes: 8a029c113b17 ("drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave") References: http://lore.kernel.org/r/87eegxq2lq.fsf@intel.com
Thanks Jani for the detailed review comments here and explanation on what broke the DSI DSC on < Gen 12 platforms.
Cc: Manasi Navare manasi.d.navare@intel.com Cc: Animesh Manna animesh.manna@intel.com Cc: Vandita Kulkarni vandita.kulkarni@intel.com Cc: stable@vger.kernel.org # v5.11+ Signed-off-by: Jani Nikula jani.nikula@intel.com
Untested, I don't have the platform.
drivers/gpu/drm/i915/display/intel_vdsc.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index f58cc5700784..a86c57d117f2 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -1014,20 +1014,14 @@ static i915_reg_t dss_ctl1_reg(const struct intel_crtc_state *crtc_state) { enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
- if (crtc_state->cpu_transcoder == TRANSCODER_EDP)
return DSS_CTL1;- return ICL_PIPE_DSS_CTL1(pipe);
- return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL1(pipe) : DSS_CTL1;
Yes using is_pipe_dsc() makes sense here in order to select proper DSS_CTL regs for DSI.
Reviewed-by: Manasi Navare manasi.d.navare@intel.com
Manasi
} static i915_reg_t dss_ctl2_reg(const struct intel_crtc_state *crtc_state) { enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
- if (crtc_state->cpu_transcoder == TRANSCODER_EDP)
return DSS_CTL2;- return ICL_PIPE_DSS_CTL2(pipe);
- return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL2(pipe) : DSS_CTL2;
} void intel_dsc_enable(struct intel_encoder *encoder, -- 2.20.1
On Fri, 19 Mar 2021, "Navare, Manasi" manasi.d.navare@intel.com wrote:
On Fri, Mar 19, 2021 at 01:53:33PM +0200, Jani Nikula wrote:
Use the correct DSS CTL registers for ICL DSI transcoders.
As a side effect, this also brings back the sanity check for trying to use pipe DSC registers on pipe A on ICL.
Fixes: 8a029c113b17 ("drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave") References: http://lore.kernel.org/r/87eegxq2lq.fsf@intel.com
Thanks Jani for the detailed review comments here and explanation on what broke the DSI DSC on < Gen 12 platforms.
Cc: Manasi Navare manasi.d.navare@intel.com Cc: Animesh Manna animesh.manna@intel.com Cc: Vandita Kulkarni vandita.kulkarni@intel.com Cc: stable@vger.kernel.org # v5.11+ Signed-off-by: Jani Nikula jani.nikula@intel.com
Untested, I don't have the platform.
drivers/gpu/drm/i915/display/intel_vdsc.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index f58cc5700784..a86c57d117f2 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -1014,20 +1014,14 @@ static i915_reg_t dss_ctl1_reg(const struct intel_crtc_state *crtc_state) { enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
- if (crtc_state->cpu_transcoder == TRANSCODER_EDP)
return DSS_CTL1;- return ICL_PIPE_DSS_CTL1(pipe);
- return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL1(pipe) : DSS_CTL1;
Yes using is_pipe_dsc() makes sense here in order to select proper DSS_CTL regs for DSI.
Reviewed-by: Manasi Navare manasi.d.navare@intel.com
Thanks, pushed to drm-intel-next.
BR, Jani.
Manasi
} static i915_reg_t dss_ctl2_reg(const struct intel_crtc_state *crtc_state) { enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
- if (crtc_state->cpu_transcoder == TRANSCODER_EDP)
return DSS_CTL2;- return ICL_PIPE_DSS_CTL2(pipe);
- return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL2(pipe) : DSS_CTL2;
} void intel_dsc_enable(struct intel_encoder *encoder, -- 2.20.1
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Jani Nikula -
Navare, Manasi