New subject: [PATCH v4.9 2/2] x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present

15 Aug 2018

From: Suravee Suthikulpanit suravee.suthikulpanit@amd.com
commit b89b41d0b8414690ec0030c134b8bde209e6d06c upstream
Current cpu_core_id fixup causes downcored F17h configurations to be
incorrect:
NODE: 0
  processor  0 core id : 0
  processor  1 core id : 1
  processor  2 core id : 2
  processor  3 core id : 4
  processor  4 core id : 5
  processor  5 core id : 0
NODE: 1
  processor  6 core id : 2
  processor  7 core id : 3
  processor  8 core id : 4
  processor  9 core id : 0
  processor 10 core id : 1
  processor 11 core id : 2
Code that relies on the cpu_core_id, like match_smt(), for example,
which builds the thread siblings masks used by the scheduler, is
mislead.
So, limit the fixup to pre-F17h machines. The new value for cpu_core_id
for F17h and later will represent the CPUID_Fn8000001E_EBX[CoreId],
which is guaranteed to be unique for each core within a socket.
This way we have:
NODE: 0
  processor  0 core id : 0
  processor  1 core id : 1
  processor  2 core id : 2
  processor  3 core id : 4
  processor  4 core id : 5
  processor  5 core id : 6
NODE: 1
  processor  6 core id : 8
  processor  7 core id : 9
  processor  8 core id : 10
  processor  9 core id : 12
  processor 10 core id : 13
  processor 11 core id : 14
Signed-off-by: Suravee Suthikulpanit suravee.suthikulpanit@amd.com
[ Heavily massaged. ]
Signed-off-by: Borislav Petkov bp@suse.de
Cc: Linus Torvalds torvalds@linux-foundation.org
Cc: Peter Zijlstra peterz@infradead.org
Cc: Thomas Gleixner tglx@linutronix.de
Cc: Yazen Ghannam Yazen.Ghannam@amd.com
Link: http://lkml.kernel.org/r/20170731085159.9455-2-bp@alien8.de
Signed-off-by: Ingo Molnar mingo@kernel.org
Signed-off-by: Guenter Roeck linux@roeck-us.net
---
 arch/x86/kernel/cpu/amd.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 6de596449488..e864ff6cd8bd 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -305,6 +305,22 @@ static void amd_get_topology_early(struct cpuinfo_x86 *c)
 }
/*
+ * Fix up cpu_core_id for pre-F17h systems to be in the
+ * [0 .. cores_per_node - 1] range. Not really needed but
+ * kept so as not to break existing setups.
+ */
+static void legacy_fixup_core_id(struct cpuinfo_x86 *c)
+{
+	u32 cus_per_node;
+
+	if (c->x86 >= 0x17)
+		return;
+
+	cus_per_node = c->x86_max_cores / nodes_per_socket;
+	c->cpu_core_id %= cus_per_node;
+}
+
+/*
  * Fixup core topology information for
  * (1) AMD multi-node processors
  *     Assumption: Number of cores in each internal node is the same.
@@ -359,15 +375,9 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
    } else
    	return;
-	/* fixup multi-node processor information */
    if (nodes_per_socket > 1) {
-		u32 cus_per_node;
-
    	set_cpu_cap(c, X86_FEATURE_AMD_DCM);
-		cus_per_node = c->x86_max_cores / nodes_per_socket;
-
-		/* core id has to be in the [0 .. cores_per_node - 1] range */
-		c->cpu_core_id %= cus_per_node;
+		legacy_fixup_core_id(c);
    }
 }
 #endif
-- 
2.7.4


    

[PATCH v4.9 1/2] x86/cpu/amd: Limit cpu_core_id fixup to families older than F17h