Hi,
Small fixes for Exynos990 HSI0 USB clocks:
Add missing LHS_ACEL clock ID and implementation, plus two missing USB clock registers. Without these, USB connections fail with errors like device descriptor read timeouts and address response issues.
These changes ensure proper USB operation by adding critical missing clock definitions.
Denzeel Oliva
Signed-off-by: Denzeel Oliva wachiturroxd150@gmail.com
Signed-off-by: Denzeel Oliva wachiturroxd150@gmail.com --- Denzeel Oliva (3): dt-bindings: clock: exynos990: Add LHS_ACEL clock ID for HSI0 block clk: samsung: exynos990: Add LHS_ACEL gate clock for HSI0 and update CLK_NR_TOP clk: samsung: exynos990: Add missing USB clock registers to HSI0
drivers/clk/samsung/clk-exynos990.c | 8 +++++++- include/dt-bindings/clock/samsung,exynos990.h | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) --- base-commit: e0edfc39b62e35dfb6d669b1189fa268147345ef change-id: 20250830-usb-c8d352f5de9f
Best regards,
Add the missing LHS_ACEL clock ID for the HSI0 block. This clock is required for proper USB operation, as without it, USB connections fail with errors like device descriptor read timeouts and address response issues.
Fixes: 5feae3e79dbe ("dt-bindings: clock: samsung: Add Exynos990 SoC CMU bindings") Cc: stable@vger.kernel.org Signed-off-by: Denzeel Oliva wachiturroxd150@gmail.com --- include/dt-bindings/clock/samsung,exynos990.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/samsung,exynos990.h b/include/dt-bindings/clock/samsung,exynos990.h index c5c79e078f2f60fdb2c0f61ba6e7f3c6f2fbe9f2..c60f15503d5b18b11ca9bdce86466512dc933901 100644 --- a/include/dt-bindings/clock/samsung,exynos990.h +++ b/include/dt-bindings/clock/samsung,exynos990.h @@ -236,6 +236,7 @@ #define CLK_GOUT_HSI0_VGEN_LITE_HSI0_CLK 20 #define CLK_GOUT_HSI0_CMU_HSI0_PCLK 21 #define CLK_GOUT_HSI0_XIU_D_HSI0_ACLK 22 +#define CLK_GOUT_HSI0_LHS_ACEL_D_HSI0_CLK 23
/* CMU_PERIS */ #define CLK_MOUT_PERIS_BUS_USER 1
On 31/08/2025 13:36, Denzeel Oliva wrote:
Add the missing LHS_ACEL clock ID for the HSI0 block. This clock is required for proper USB operation, as without it, USB connections fail with errors like device descriptor read timeouts and address response issues.
Incomplete feature due to missing clock is not really a fix, considering that we add clocks piece-by-piece. Otherwise every new clock would be a fix.
Unless something else changed and the USB was working fine before?
If not, drop fixes and cc-stable from this and following commits.
Fixes: 5feae3e79dbe ("dt-bindings: clock: samsung: Add Exynos990 SoC CMU bindings") Cc: stable@vger.kernel.org Signed-off-by: Denzeel Oliva wachiturroxd150@gmail.com
include/dt-bindings/clock/samsung,exynos990.h | 1 +
Best regards, Krzysztof
Add the LHS_ACEL gate clock to the HSI0 clock controller. This clock is critical for USB functionality and mark it as critical to keep it enabled and update CLK_NR_TOP.
Fixes: bdd03ebf721f ("clk: samsung: Introduce Exynos990 clock controller driver") Cc: stable@vger.kernel.org Signed-off-by: Denzeel Oliva wachiturroxd150@gmail.com --- drivers/clk/samsung/clk-exynos990.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos990.c b/drivers/clk/samsung/clk-exynos990.c index 91736b15c4b4a0759419517f7b04dd0a8f38a289..7884354d612c54039289fa9b80ad08f34b9b7029 100644 --- a/drivers/clk/samsung/clk-exynos990.c +++ b/drivers/clk/samsung/clk-exynos990.c @@ -18,7 +18,7 @@
/* NOTE: Must be equal to the last clock ID increased by one */ #define CLKS_NR_TOP (CLK_DOUT_CMU_CLK_CMUREF + 1) -#define CLKS_NR_HSI0 (CLK_GOUT_HSI0_XIU_D_HSI0_ACLK + 1) +#define CLKS_NR_HSI0 (CLK_GOUT_HSI0_LHS_ACEL_D_HSI0_CLK + 1) #define CLKS_NR_PERIS (CLK_GOUT_PERIS_OTP_CON_TOP_OSCCLK + 1)
/* ---- CMU_TOP ------------------------------------------------------------- */ @@ -1332,6 +1332,10 @@ static const struct samsung_gate_clock hsi0_gate_clks[] __initconst = { "gout_hsi0_xiu_d_hsi0_aclk", "mout_hsi0_bus_user", CLK_CON_GAT_GOUT_BLK_HSI0_UID_XIU_D_HSI0_IPCLKPORT_ACLK, 21, CLK_IGNORE_UNUSED, 0), + GATE(CLK_GOUT_HSI0_LHS_ACEL_D_HSI0_CLK, + "gout_hsi0_lhs_acel_d_hsi0_clk", "mout_hsi0_bus_user", + CLK_CON_GAT_GOUT_BLK_HSI0_UID_LHS_ACEL_D_HSI0_IPCLKPORT_I_CLK, + 21, CLK_IS_CRITICAL, 0), };
static const struct samsung_cmu_info hsi0_cmu_info __initconst = {
These registers are required for proper USB operation and were omitted in the initial clock controller setup.
Fixes: bdd03ebf721f ("clk: samsung: Introduce Exynos990 clock controller driver") Cc: stable@vger.kernel.org Signed-off-by: Denzeel Oliva wachiturroxd150@gmail.com --- drivers/clk/samsung/clk-exynos990.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos990.c b/drivers/clk/samsung/clk-exynos990.c index 7884354d612c54039289fa9b80ad08f34b9b7029..47a1e0850c3020ab66931ae0c5ac4920f41496d0 100644 --- a/drivers/clk/samsung/clk-exynos990.c +++ b/drivers/clk/samsung/clk-exynos990.c @@ -1224,6 +1224,8 @@ static const unsigned long hsi0_clk_regs[] __initconst = { CLK_CON_GAT_GOUT_BLK_HSI0_UID_SYSMMU_USB_IPCLKPORT_CLK_S2, CLK_CON_GAT_GOUT_BLK_HSI0_UID_SYSREG_HSI0_IPCLKPORT_PCLK, CLK_CON_GAT_GOUT_BLK_HSI0_UID_USB31DRD_IPCLKPORT_ACLK_PHYCTRL, + CLK_CON_GAT_GOUT_BLK_HSI0_UID_USB31DRD_IPCLKPORT_I_USB31DRD_REF_CLK_40, + CLK_CON_GAT_GOUT_BLK_HSI0_UID_USB31DRD_IPCLKPORT_I_USBDPPHY_REF_SOC_PLL, CLK_CON_GAT_GOUT_BLK_HSI0_UID_USB31DRD_IPCLKPORT_I_USBDPPHY_SCL_APB_PCLK, CLK_CON_GAT_GOUT_BLK_HSI0_UID_USB31DRD_IPCLKPORT_I_USBPCS_APB_CLK, CLK_CON_GAT_GOUT_BLK_HSI0_UID_USB31DRD_IPCLKPORT_BUS_CLK_EARLY,
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