These patches are backport candidates picked out of TI's 4.14.y tree [1], with most of them already found in the 4.19.y stable tree.
The set apply and compiles cleanly on 4.14.141.
Thanks, Mathieu
[1]. http://git.ti.com/gitweb/?p=ti-linux-kernel/ti-linux-kernel.git%3Ba=shortlog...
Andrew F. Davis (1): ASoC: tlv320aic31xx: Handle inverted BCLK in non-DSP modes
Arvind Yadav (1): ASoC: davinci-mcasp: Handle return value of devm_kasprintf
Christophe Jaillet (1): ASoC: davinci-mcasp: Fix an error handling path in 'davinci_mcasp_probe()'
Claudio Foellmi (1): i2c: omap: Trigger bus recovery in lockup case
Dan Carpenter (1): misc: pci_endpoint_test: Prevent some integer overflows
Gustavo A. R. Silva (1): ASoC: tlv320dac31xx: mark expected switch fall-through
Keerthy (2): mfd: palmas: Assign the right powerhold mask for tps65917 PCI: dra7xx: Add shutdown handler to cleanly turn off clocks
Kishon Vijay Abraham I (1): misc: pci_endpoint_test: Fix BUG_ON error during pci_disable_msi()
Niklas Cassel (1): PCI: designware-ep: Fix find_first_zero_bit() usage
Roger Quadros (1): usb: dwc3: Allow disabling of metastability workaround
Roman Yeryomin (1): mtd: spi-nor: enable 4B opcodes for mx66l51235l
Sudeep Holla (1): mailbox: reset txdone_method TXDONE_BY_POLL if client knows_txdone
Takashi Iwai (1): ASoC: davinci: Kill BUG_ON() usage
Tony Lindgren (1): drm/omap: panel-dsi-cm: fix driver
Vignesh R (2): PCI: dra7xx: Fix legacy INTD IRQ handling mtd: spi-nor: cadence-quadspi: add a delay in write sequence
Zumeng Chen (1): cpufreq: ti-cpufreq: add missing of_node_put()
.../devicetree/bindings/usb/dwc3.txt | 2 + drivers/cpufreq/ti-cpufreq.c | 1 + .../gpu/drm/omapdrm/displays/panel-dsi-cm.c | 56 +++++++++++++++++-- drivers/i2c/busses/i2c-omap.c | 25 ++++++++- drivers/mailbox/mailbox.c | 4 +- drivers/mailbox/pcc.c | 4 +- drivers/mfd/palmas.c | 10 +++- drivers/misc/pci_endpoint_test.c | 17 ++++++ drivers/mtd/spi-nor/cadence-quadspi.c | 27 ++++++++- drivers/mtd/spi-nor/spi-nor.c | 2 +- drivers/pci/dwc/pci-dra7xx.c | 20 ++++++- drivers/pci/dwc/pcie-designware-ep.c | 34 ++++++++--- drivers/pci/dwc/pcie-designware.h | 8 ++- drivers/usb/dwc3/core.c | 3 + drivers/usb/dwc3/core.h | 3 + drivers/usb/dwc3/gadget.c | 6 +- include/linux/mfd/palmas.h | 3 + sound/soc/codecs/tlv320aic31xx.c | 30 ++++++---- sound/soc/davinci/davinci-mcasp.c | 21 ++++++- 19 files changed, 235 insertions(+), 41 deletions(-)
From: Niklas Cassel niklas.cassel@axis.com
commit ad4a5becc689c3f32bbbc2b37eff89efe19dc2f9 upstream
find_first_zero_bit()'s parameter 'size' is defined in bits, not in bytes.
find_first_zero_bit() is called with size in bytes rather than bits, which thus defines a too low upper limit, causing dw_pcie_ep_inbound_atu() to assign iatu index #4 to both bar 4 and bar 5, which makes bar 5 overwrite the settings set by bar 4.
Since the sizes of the bitmaps are known, dynamically allocate the bitmaps, and use the correct size when calling find_first_zero_bit().
Additionally, make sure that ep->num_ob_windows and ep->num_ib_windows, which are obtained from device tree, are smaller than the maximum number of iATUs (MAX_IATU_IN/MAX_IATU_OUT).
Fixes: f8aed6ec624f ("PCI: dwc: designware: Add EP mode support") Signed-off-by: Niklas Cassel niklas.cassel@axis.com Signed-off-by: Lorenzo Pieralisi lorenzo.pieralisi@arm.com Acked-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/pci/dwc/pcie-designware-ep.c | 34 +++++++++++++++++++++------- drivers/pci/dwc/pcie-designware.h | 8 +++++-- 2 files changed, 32 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c index abcbf0770358..71795db41261 100644 --- a/drivers/pci/dwc/pcie-designware-ep.c +++ b/drivers/pci/dwc/pcie-designware-ep.c @@ -74,8 +74,7 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, enum pci_barno bar, u32 free_win; struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
- free_win = find_first_zero_bit(&ep->ib_window_map, - sizeof(ep->ib_window_map)); + free_win = find_first_zero_bit(ep->ib_window_map, ep->num_ib_windows); if (free_win >= ep->num_ib_windows) { dev_err(pci->dev, "no free inbound window\n"); return -EINVAL; @@ -89,7 +88,7 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, enum pci_barno bar, }
ep->bar_to_atu[bar] = free_win; - set_bit(free_win, &ep->ib_window_map); + set_bit(free_win, ep->ib_window_map);
return 0; } @@ -100,8 +99,7 @@ static int dw_pcie_ep_outbound_atu(struct dw_pcie_ep *ep, phys_addr_t phys_addr, u32 free_win; struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
- free_win = find_first_zero_bit(&ep->ob_window_map, - sizeof(ep->ob_window_map)); + free_win = find_first_zero_bit(ep->ob_window_map, ep->num_ob_windows); if (free_win >= ep->num_ob_windows) { dev_err(pci->dev, "no free outbound window\n"); return -EINVAL; @@ -110,7 +108,7 @@ static int dw_pcie_ep_outbound_atu(struct dw_pcie_ep *ep, phys_addr_t phys_addr, dw_pcie_prog_outbound_atu(pci, free_win, PCIE_ATU_TYPE_MEM, phys_addr, pci_addr, size);
- set_bit(free_win, &ep->ob_window_map); + set_bit(free_win, ep->ob_window_map); ep->outbound_addr[free_win] = phys_addr;
return 0; @@ -125,7 +123,7 @@ static void dw_pcie_ep_clear_bar(struct pci_epc *epc, enum pci_barno bar) dw_pcie_ep_reset_bar(pci, bar);
dw_pcie_disable_atu(pci, atu_index, DW_PCIE_REGION_INBOUND); - clear_bit(atu_index, &ep->ib_window_map); + clear_bit(atu_index, ep->ib_window_map); }
static int dw_pcie_ep_set_bar(struct pci_epc *epc, enum pci_barno bar, @@ -181,7 +179,7 @@ static void dw_pcie_ep_unmap_addr(struct pci_epc *epc, phys_addr_t addr) return;
dw_pcie_disable_atu(pci, atu_index, DW_PCIE_REGION_OUTBOUND); - clear_bit(atu_index, &ep->ob_window_map); + clear_bit(atu_index, ep->ob_window_map); }
static int dw_pcie_ep_map_addr(struct pci_epc *epc, phys_addr_t addr, @@ -302,12 +300,32 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep) dev_err(dev, "unable to read *num-ib-windows* property\n"); return ret; } + if (ep->num_ib_windows > MAX_IATU_IN) { + dev_err(dev, "invalid *num-ib-windows*\n"); + return -EINVAL; + }
ret = of_property_read_u32(np, "num-ob-windows", &ep->num_ob_windows); if (ret < 0) { dev_err(dev, "unable to read *num-ob-windows* property\n"); return ret; } + if (ep->num_ob_windows > MAX_IATU_OUT) { + dev_err(dev, "invalid *num-ob-windows*\n"); + return -EINVAL; + } + + ep->ib_window_map = devm_kzalloc(dev, sizeof(long) * + BITS_TO_LONGS(ep->num_ib_windows), + GFP_KERNEL); + if (!ep->ib_window_map) + return -ENOMEM; + + ep->ob_window_map = devm_kzalloc(dev, sizeof(long) * + BITS_TO_LONGS(ep->num_ob_windows), + GFP_KERNEL); + if (!ep->ob_window_map) + return -ENOMEM;
addr = devm_kzalloc(dev, sizeof(phys_addr_t) * ep->num_ob_windows, GFP_KERNEL); diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h index 5af29d125c7e..ba9dedc31bfa 100644 --- a/drivers/pci/dwc/pcie-designware.h +++ b/drivers/pci/dwc/pcie-designware.h @@ -114,6 +114,10 @@ #define MAX_MSI_IRQS 32 #define MAX_MSI_CTRLS (MAX_MSI_IRQS / 32)
+/* Maximum number of inbound/outbound iATUs */ +#define MAX_IATU_IN 256 +#define MAX_IATU_OUT 256 + struct pcie_port; struct dw_pcie; struct dw_pcie_ep; @@ -193,8 +197,8 @@ struct dw_pcie_ep { size_t page_size; u8 bar_to_atu[6]; phys_addr_t *outbound_addr; - unsigned long ib_window_map; - unsigned long ob_window_map; + unsigned long *ib_window_map; + unsigned long *ob_window_map; u32 num_ib_windows; u32 num_ob_windows; };
From: Vignesh R vigneshr@ti.com
commit 524d59f6e30aab5b618da55e604c802ccd83e708 upstream
Legacy INTD IRQ handling is broken on dra7xx due to fact that driver uses hwirq in range of 1-4 for INTA, INTD whereas IRQ domain is of size 4 which is numbered 0-3. Therefore when INTD IRQ line is used with pci-dra7xx driver following warning is seen:
WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:342 irq_domain_associate+0x12c/0x1c4 error: hwirq 0x4 is too large for dummy
Fix this by using pci_irqd_intx_xlate() helper to translate the INTx 1-4 range into the 0-3 as done in other PCIe drivers.
Suggested-by: Bjorn Helgaas bhelgaas@google.com Reported-by: Chris Welch Chris.Welch@viavisolutions.com Signed-off-by: Vignesh R vigneshr@ti.com Signed-off-by: Lorenzo Pieralisi lorenzo.pieralisi@arm.com Acked-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/pci/dwc/pci-dra7xx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c index 63052c5e5f82..7f5dfa169d0f 100644 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -227,6 +227,7 @@ static int dra7xx_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
static const struct irq_domain_ops intx_domain_ops = { .map = dra7xx_pcie_intx_map, + .xlate = pci_irqd_intx_xlate, };
static int dra7xx_pcie_init_irq_domain(struct pcie_port *pp) @@ -270,7 +271,7 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) case INTC: case INTD: generic_handle_irq(irq_find_mapping(dra7xx->irq_domain, - ffs(reg))); + ffs(reg) - 1)); break; }
From: Tony Lindgren tony@atomide.com
commit e128310ddd379b0fdd21dc41d176c3b3505a0832 upstream
This adds support for get_timings() and check_timings() to get the driver working and properly initializes the timing information from DT.
Signed-off-by: Tony Lindgren tony@atomide.com Signed-off-by: Sebastian Reichel sebastian.reichel@collabora.co.uk Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- .../gpu/drm/omapdrm/displays/panel-dsi-cm.c | 56 +++++++++++++++++-- 1 file changed, 51 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c index 92c556ac22c7..905b71719d65 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c @@ -25,6 +25,7 @@ #include <linux/of_gpio.h>
#include <video/mipi_display.h> +#include <video/of_display_timing.h>
#include "../dss/omapdss.h"
@@ -1099,6 +1100,36 @@ static void dsicm_ulps_work(struct work_struct *work) mutex_unlock(&ddata->lock); }
+static void dsicm_get_timings(struct omap_dss_device *dssdev, + struct videomode *vm) +{ + struct panel_drv_data *ddata = to_panel_data(dssdev); + + *vm = ddata->vm; +} + +static int dsicm_check_timings(struct omap_dss_device *dssdev, + struct videomode *vm) +{ + struct panel_drv_data *ddata = to_panel_data(dssdev); + int ret = 0; + + if (vm->hactive != ddata->vm.hactive) + ret = -EINVAL; + + if (vm->vactive != ddata->vm.vactive) + ret = -EINVAL; + + if (ret) { + dev_warn(dssdev->dev, "wrong resolution: %d x %d", + vm->hactive, vm->vactive); + dev_warn(dssdev->dev, "panel resolution: %d x %d", + ddata->vm.hactive, ddata->vm.vactive); + } + + return ret; +} + static struct omap_dss_driver dsicm_ops = { .connect = dsicm_connect, .disconnect = dsicm_disconnect, @@ -1109,6 +1140,9 @@ static struct omap_dss_driver dsicm_ops = { .update = dsicm_update, .sync = dsicm_sync,
+ .get_timings = dsicm_get_timings, + .check_timings = dsicm_check_timings, + .enable_te = dsicm_enable_te, .get_te = dsicm_get_te,
@@ -1120,7 +1154,8 @@ static int dsicm_probe_of(struct platform_device *pdev) struct device_node *node = pdev->dev.of_node; struct panel_drv_data *ddata = platform_get_drvdata(pdev); struct omap_dss_device *in; - int gpio; + struct display_timing timing; + int gpio, err;
gpio = of_get_named_gpio(node, "reset-gpios", 0); if (!gpio_is_valid(gpio)) { @@ -1137,6 +1172,17 @@ static int dsicm_probe_of(struct platform_device *pdev) return gpio; }
+ err = of_get_display_timing(node, "panel-timing", &timing); + if (!err) { + videomode_from_timing(&timing, &ddata->vm); + if (!ddata->vm.pixelclock) + ddata->vm.pixelclock = + ddata->vm.hactive * ddata->vm.vactive * 60; + } else { + dev_warn(&pdev->dev, + "failed to get video timing, using defaults\n"); + } + in = omapdss_of_find_source_for_first_ep(node); if (IS_ERR(in)) { dev_err(&pdev->dev, "failed to find video source\n"); @@ -1171,14 +1217,14 @@ static int dsicm_probe(struct platform_device *pdev) if (!pdev->dev.of_node) return -ENODEV;
- r = dsicm_probe_of(pdev); - if (r) - return r; - ddata->vm.hactive = 864; ddata->vm.vactive = 480; ddata->vm.pixelclock = 864 * 480 * 60;
+ r = dsicm_probe_of(pdev); + if (r) + return r; + dssdev = &ddata->dssdev; dssdev->dev = dev; dssdev->driver = &dsicm_ops;
On Thu, Sep 05, 2019 at 10:17:44AM -0600, Mathieu Poirier wrote:
From: Tony Lindgren tony@atomide.com
commit e128310ddd379b0fdd21dc41d176c3b3505a0832 upstream
This adds support for get_timings() and check_timings() to get the driver working and properly initializes the timing information from DT.
Signed-off-by: Tony Lindgren tony@atomide.com Signed-off-by: Sebastian Reichel sebastian.reichel@collabora.co.uk Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org
.../gpu/drm/omapdrm/displays/panel-dsi-cm.c | 56 +++++++++++++++++-- 1 file changed, 51 insertions(+), 5 deletions(-)
THis looks like a "new feature", right? Why is this a stable patch?
thanks,
greg k-h
On Tue, 10 Sep 2019 at 08:35, Greg KH greg@kroah.com wrote:
On Thu, Sep 05, 2019 at 10:17:44AM -0600, Mathieu Poirier wrote:
From: Tony Lindgren tony@atomide.com
commit e128310ddd379b0fdd21dc41d176c3b3505a0832 upstream
This adds support for get_timings() and check_timings() to get the driver working and properly initializes the timing information from DT.
Signed-off-by: Tony Lindgren tony@atomide.com Signed-off-by: Sebastian Reichel sebastian.reichel@collabora.co.uk Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org
.../gpu/drm/omapdrm/displays/panel-dsi-cm.c | 56 +++++++++++++++++-- 1 file changed, 51 insertions(+), 5 deletions(-)
THis looks like a "new feature", right? Why is this a stable patch?
I thought it was part of 4.19.y but looking at it again I see that it is there as part of the mainline base rather than a backport.
Please drop.
Thanks, Mathieu
thanks,
greg k-h
From: Roger Quadros rogerq@ti.com
commit 42bf02ec6e420e541af9a47437d0bdf961ca2972 upstream
Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble with the metastability workaround as it supports only a High-Speed PHY and the PHY can enter into an Erratic state [1] when the controller is set in SuperSpeed mode as part of the metastability workaround.
This causes upto 2 seconds delay in enumeration on DRA7's USB2 instance in gadget mode.
If these platforms can be better off without the workaround, provide a device tree property to suggest that so the workaround is avoided.
[1] Device mode enumeration trace showing PHY Erratic Error. irq/90-dwc3-969 [000] d... 52.323145: dwc3_event: event (00000901): Erratic Error [U0] irq/90-dwc3-969 [000] d... 52.560646: dwc3_event: event (00000901): Erratic Error [U0] irq/90-dwc3-969 [000] d... 52.798144: dwc3_event: event (00000901): Erratic Error [U0]
Signed-off-by: Roger Quadros rogerq@ti.com Signed-off-by: Felipe Balbi felipe.balbi@linux.intel.com Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++ drivers/usb/dwc3/core.c | 3 +++ drivers/usb/dwc3/core.h | 3 +++ drivers/usb/dwc3/gadget.c | 6 ++++-- 4 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 52fb41046b34..44e8bab159ad 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -47,6 +47,8 @@ Optional properties: from P0 to P1/P2/P3 without delay. - snps,dis-tx-ipgap-linecheck-quirk: when set, disable u2mac linestate check during HS transmit. + - snps,dis_metastability_quirk: when set, disable metastability workaround. + CAUTION: use only if you are absolutely sure of it. - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal utmi_l1_suspend_n, false when asserts utmi_sleep_n - snps,hird-threshold: HIRD threshold diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 945330ea8d5c..9b093978bd24 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1115,6 +1115,9 @@ static void dwc3_get_properties(struct dwc3 *dwc) device_property_read_u32(dev, "snps,quirk-frame-length-adjustment", &dwc->fladj);
+ dwc->dis_metastability_quirk = device_property_read_bool(dev, + "snps,dis_metastability_quirk"); + dwc->lpm_nyet_threshold = lpm_nyet_threshold; dwc->tx_de_emphasis = tx_de_emphasis;
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index abd1142c9e4d..40bf0e0768d9 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -869,6 +869,7 @@ struct dwc3_scratchpad_array { * 1 - -3.5dB de-emphasis * 2 - No de-emphasis * 3 - Reserved + * @dis_metastability_quirk: set to disable metastability quirk. * @imod_interval: set the interrupt moderation interval in 250ns * increments or 0 to disable. */ @@ -1025,6 +1026,8 @@ struct dwc3 { unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2;
+ unsigned dis_metastability_quirk:1; + u16 imod_interval; };
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 1b99d44e52b9..5916340c4162 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2034,7 +2034,8 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, * STAR#9000525659: Clock Domain Crossing on DCTL in * USB 2.0 Mode */ - if (dwc->revision < DWC3_REVISION_220A) { + if (dwc->revision < DWC3_REVISION_220A && + !dwc->dis_metastability_quirk) { reg |= DWC3_DCFG_SUPERSPEED; } else { switch (speed) { @@ -3265,7 +3266,8 @@ int dwc3_gadget_init(struct dwc3 *dwc) * is less than super speed because we don't have means, yet, to tell * composite.c that we are USB 2.0 + LPM ECN. */ - if (dwc->revision < DWC3_REVISION_220A) + if (dwc->revision < DWC3_REVISION_220A && + !dwc->dis_metastability_quirk) dev_info(dwc->dev, "changing max_speed on rev %08x\n", dwc->revision);
On Thu, Sep 05, 2019 at 10:17:45AM -0600, Mathieu Poirier wrote:
From: Roger Quadros rogerq@ti.com
commit 42bf02ec6e420e541af9a47437d0bdf961ca2972 upstream
Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble with the metastability workaround as it supports only a High-Speed PHY and the PHY can enter into an Erratic state [1] when the controller is set in SuperSpeed mode as part of the metastability workaround.
This causes upto 2 seconds delay in enumeration on DRA7's USB2 instance in gadget mode.
If these platforms can be better off without the workaround, provide a device tree property to suggest that so the workaround is avoided.
[1] Device mode enumeration trace showing PHY Erratic Error. irq/90-dwc3-969 [000] d... 52.323145: dwc3_event: event (00000901): Erratic Error [U0] irq/90-dwc3-969 [000] d... 52.560646: dwc3_event: event (00000901): Erratic Error [U0] irq/90-dwc3-969 [000] d... 52.798144: dwc3_event: event (00000901): Erratic Error [U0]
Does the DT also need to get updated with this new id for this? Is that a separate patch somewhere?
thanks,
greg k-h
On Tue, 10 Sep 2019 at 08:36, Greg KH greg@kroah.com wrote:
On Thu, Sep 05, 2019 at 10:17:45AM -0600, Mathieu Poirier wrote:
From: Roger Quadros rogerq@ti.com
commit 42bf02ec6e420e541af9a47437d0bdf961ca2972 upstream
Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble with the metastability workaround as it supports only a High-Speed PHY and the PHY can enter into an Erratic state [1] when the controller is set in SuperSpeed mode as part of the metastability workaround.
This causes upto 2 seconds delay in enumeration on DRA7's USB2 instance in gadget mode.
If these platforms can be better off without the workaround, provide a device tree property to suggest that so the workaround is avoided.
[1] Device mode enumeration trace showing PHY Erratic Error. irq/90-dwc3-969 [000] d... 52.323145: dwc3_event: event (00000901): Erratic Error [U0] irq/90-dwc3-969 [000] d... 52.560646: dwc3_event: event (00000901): Erratic Error [U0] irq/90-dwc3-969 [000] d... 52.798144: dwc3_event: event (00000901): Erratic Error [U0]
Does the DT also need to get updated with this new id for this? Is that a separate patch somewhere?
The upstream commit is:
b8c9c6fa2002 ARM: dts: dra7: Disable USB metastability workaround for USB2
Should I just send the latter or you prefer a resend with both patches?
Thanks, Mathieu
thanks,
greg k-h
On Wed, Sep 11, 2019 at 08:01:40AM -0600, Mathieu Poirier wrote:
On Tue, 10 Sep 2019 at 08:36, Greg KH greg@kroah.com wrote:
On Thu, Sep 05, 2019 at 10:17:45AM -0600, Mathieu Poirier wrote:
From: Roger Quadros rogerq@ti.com
commit 42bf02ec6e420e541af9a47437d0bdf961ca2972 upstream
Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble with the metastability workaround as it supports only a High-Speed PHY and the PHY can enter into an Erratic state [1] when the controller is set in SuperSpeed mode as part of the metastability workaround.
This causes upto 2 seconds delay in enumeration on DRA7's USB2 instance in gadget mode.
If these platforms can be better off without the workaround, provide a device tree property to suggest that so the workaround is avoided.
[1] Device mode enumeration trace showing PHY Erratic Error. irq/90-dwc3-969 [000] d... 52.323145: dwc3_event: event (00000901): Erratic Error [U0] irq/90-dwc3-969 [000] d... 52.560646: dwc3_event: event (00000901): Erratic Error [U0] irq/90-dwc3-969 [000] d... 52.798144: dwc3_event: event (00000901): Erratic Error [U0]
Does the DT also need to get updated with this new id for this? Is that a separate patch somewhere?
The upstream commit is:
b8c9c6fa2002 ARM: dts: dra7: Disable USB metastability workaround for USB2
Should I just send the latter or you prefer a resend with both patches?
I've queued this up now, along with the rest of this series, thanks.
greg k-h
From: Keerthy j-keerthy@ti.com
commit 572ff4d560be3784205b224cd67d6715620092d7 upstream
The powerhold mask for TPS65917 is different when comapred to the other palmas versions. Hence assign the right mask that enables power off of tps65917 pmic correctly.
Signed-off-by: Keerthy j-keerthy@ti.com Signed-off-by: Lee Jones lee.jones@linaro.org Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/mfd/palmas.c | 10 +++++++++- include/linux/mfd/palmas.h | 3 +++ 2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c index 3922a93f9f92..663a2398b6b1 100644 --- a/drivers/mfd/palmas.c +++ b/drivers/mfd/palmas.c @@ -430,6 +430,7 @@ static void palmas_power_off(void) { unsigned int addr; int ret, slave; + u8 powerhold_mask; struct device_node *np = palmas_dev->dev->of_node;
if (of_property_read_bool(np, "ti,palmas-override-powerhold")) { @@ -437,8 +438,15 @@ static void palmas_power_off(void) PALMAS_PRIMARY_SECONDARY_PAD2); slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
+ if (of_device_is_compatible(np, "ti,tps65917")) + powerhold_mask = + TPS65917_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK; + else + powerhold_mask = + PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK; + ret = regmap_update_bits(palmas_dev->regmap[slave], addr, - PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK, 0); + powerhold_mask, 0); if (ret) dev_err(palmas_dev->dev, "Unable to write PRIMARY_SECONDARY_PAD2 %d\n", diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h index 6dec43826303..cffb23b8bd70 100644 --- a/include/linux/mfd/palmas.h +++ b/include/linux/mfd/palmas.h @@ -3733,6 +3733,9 @@ enum usb_irq_events { #define TPS65917_REGEN3_CTRL_MODE_ACTIVE 0x01 #define TPS65917_REGEN3_CTRL_MODE_ACTIVE_SHIFT 0x00
+/* POWERHOLD Mask field for PRIMARY_SECONDARY_PAD2 register */ +#define TPS65917_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK 0xC + /* Registers for function RESOURCE */ #define TPS65917_REGEN1_CTRL 0x2 #define TPS65917_PLLEN_CTRL 0x3
From: "Andrew F. Davis" afd@ti.com
commit dcb407b257af06fa58b0544ec01ec9e0d3927e02 upstream
Currently BCLK inverting is only handled when the DAI format is DSP, but the BCLK may be inverted in any supported mode. Without this using this CODEC in any other mode than DSP with the BCLK inverted leads to bad sampling timing and very poor audio quality.
Signed-off-by: Andrew F. Davis afd@ti.com Signed-off-by: Mark Brown broonie@kernel.org Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- sound/soc/codecs/tlv320aic31xx.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c index 54a87a905eb6..d3bd0bf15ddb 100644 --- a/sound/soc/codecs/tlv320aic31xx.c +++ b/sound/soc/codecs/tlv320aic31xx.c @@ -924,6 +924,18 @@ static int aic31xx_set_dai_fmt(struct snd_soc_dai *codec_dai, return -EINVAL; }
+ /* signal polarity */ + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + iface_reg2 |= AIC31XX_BCLKINV_MASK; + break; + default: + dev_err(codec->dev, "Invalid DAI clock signal polarity\n"); + return -EINVAL; + } + /* interface format */ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_I2S: @@ -931,16 +943,12 @@ static int aic31xx_set_dai_fmt(struct snd_soc_dai *codec_dai, case SND_SOC_DAIFMT_DSP_A: dsp_a_val = 0x1; case SND_SOC_DAIFMT_DSP_B: - /* NOTE: BCLKINV bit value 1 equas NB and 0 equals IB */ - switch (fmt & SND_SOC_DAIFMT_INV_MASK) { - case SND_SOC_DAIFMT_NB_NF: - iface_reg2 |= AIC31XX_BCLKINV_MASK; - break; - case SND_SOC_DAIFMT_IB_NF: - break; - default: - return -EINVAL; - } + /* + * NOTE: This CODEC samples on the falling edge of BCLK in + * DSP mode, this is inverted compared to what most DAIs + * expect, so we invert for this mode + */ + iface_reg2 ^= AIC31XX_BCLKINV_MASK; iface_reg1 |= (AIC31XX_DSP_MODE << AIC31XX_IFACE1_DATATYPE_SHIFT); break;
From: Roman Yeryomin leroi.lists@gmail.com
commit d342b6a973af459f6104cad6effc8efc71a0558d upstream
Signed-off-by: Roman Yeryomin roman@advem.lv Signed-off-by: Cyrille Pitchen cyrille.pitchen@wedev4u.fr Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/mtd/spi-nor/spi-nor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 34ecc12ee3d9..6c013341ef09 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1030,7 +1030,7 @@ static const struct flash_info spi_nor_ids[] = { { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) }, { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, - { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { "mx66u51235f", INFO(0xc2253a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },
From: Vignesh R vigneshr@ti.com
commit 61dc8493bae9ba82a1c72edbc6c6065f6a94456a upstream
As per 66AK2G02 TRM[1] SPRUHY8F section 11.15.5.3 Indirect Access Controller programming sequence, a delay equal to couple of QSPI master clock(~5ns) is required after setting CQSPI_REG_INDIRECTWR_START bit and writing data to the flash. Introduce a quirk flag CQSPI_NEEDS_WR_DELAY to handle this and set this flag for TI 66AK2G SoC.
[1]http://www.ti.com/lit/ug/spruhy8f/spruhy8f.pdf
Signed-off-by: Vignesh R vigneshr@ti.com Acked-by: Marek Vasut marek.vasut@gmail.com Signed-off-by: Cyrille Pitchen cyrille.pitchen@wedev4u.fr Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/mtd/spi-nor/cadence-quadspi.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c index f22dd34f4f83..ff4edf4bb23c 100644 --- a/drivers/mtd/spi-nor/cadence-quadspi.c +++ b/drivers/mtd/spi-nor/cadence-quadspi.c @@ -38,6 +38,9 @@ #define CQSPI_NAME "cadence-qspi" #define CQSPI_MAX_CHIPSELECT 16
+/* Quirks */ +#define CQSPI_NEEDS_WR_DELAY BIT(0) + struct cqspi_st;
struct cqspi_flash_pdata { @@ -76,6 +79,7 @@ struct cqspi_st { u32 fifo_depth; u32 fifo_width; u32 trigger_address; + u32 wr_delay; struct cqspi_flash_pdata f_pdata[CQSPI_MAX_CHIPSELECT]; };
@@ -623,6 +627,15 @@ static int cqspi_indirect_write_execute(struct spi_nor *nor, reinit_completion(&cqspi->transfer_complete); writel(CQSPI_REG_INDIRECTWR_START_MASK, reg_base + CQSPI_REG_INDIRECTWR); + /* + * As per 66AK2G02 TRM SPRUHY8F section 11.15.5.3 Indirect Access + * Controller programming sequence, couple of cycles of + * QSPI_REF_CLK delay is required for the above bit to + * be internally synchronized by the QSPI module. Provide 5 + * cycles of delay. + */ + if (cqspi->wr_delay) + ndelay(cqspi->wr_delay);
while (remaining > 0) { size_t write_words, mod_bytes; @@ -1184,6 +1197,7 @@ static int cqspi_probe(struct platform_device *pdev) struct cqspi_st *cqspi; struct resource *res; struct resource *res_ahb; + unsigned long data; int ret; int irq;
@@ -1241,6 +1255,10 @@ static int cqspi_probe(struct platform_device *pdev) }
cqspi->master_ref_clk_hz = clk_get_rate(cqspi->clk); + data = (unsigned long)of_device_get_match_data(dev); + if (data & CQSPI_NEEDS_WR_DELAY) + cqspi->wr_delay = 5 * DIV_ROUND_UP(NSEC_PER_SEC, + cqspi->master_ref_clk_hz);
ret = devm_request_irq(dev, irq, cqspi_irq_handler, 0, pdev->name, cqspi); @@ -1312,7 +1330,14 @@ static const struct dev_pm_ops cqspi__dev_pm_ops = { #endif
static const struct of_device_id cqspi_dt_ids[] = { - {.compatible = "cdns,qspi-nor",}, + { + .compatible = "cdns,qspi-nor", + .data = (void *)0, + }, + { + .compatible = "ti,k2g-qspi", + .data = (void *)CQSPI_NEEDS_WR_DELAY, + }, { /* end of table */ } };
From: Dan Carpenter dan.carpenter@oracle.com
commit 378f79cab12b669928f3a4037f023837ead2ce0c upstream
"size + max" can have an arithmetic overflow when we're allocating:
orig_src_addr = dma_alloc_coherent(dev, size + alignment, ...
I've added a few checks to prevent that.
Fixes: 13107c60681f ("misc: pci_endpoint_test: Add support to provide aligned buffer addresses") Signed-off-by: Dan Carpenter dan.carpenter@oracle.com Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/misc/pci_endpoint_test.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c index 9849bf183299..504fa680825d 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -226,6 +226,9 @@ static bool pci_endpoint_test_copy(struct pci_endpoint_test *test, size_t size) u32 src_crc32; u32 dst_crc32;
+ if (size > SIZE_MAX - alignment) + goto err; + orig_src_addr = dma_alloc_coherent(dev, size + alignment, &orig_src_phys_addr, GFP_KERNEL); if (!orig_src_addr) { @@ -311,6 +314,9 @@ static bool pci_endpoint_test_write(struct pci_endpoint_test *test, size_t size) size_t alignment = test->alignment; u32 crc32;
+ if (size > SIZE_MAX - alignment) + goto err; + orig_addr = dma_alloc_coherent(dev, size + alignment, &orig_phys_addr, GFP_KERNEL); if (!orig_addr) { @@ -369,6 +375,9 @@ static bool pci_endpoint_test_read(struct pci_endpoint_test *test, size_t size) size_t alignment = test->alignment; u32 crc32;
+ if (size > SIZE_MAX - alignment) + goto err; + orig_addr = dma_alloc_coherent(dev, size + alignment, &orig_phys_addr, GFP_KERNEL); if (!orig_addr) {
From: Keerthy j-keerthy@ti.com
commit 9c049bea083fea21373b8baf51fe49acbe24e105 upstream
Add shutdown handler to cleanly turn off clocks. This will help in cases of kexec where in a new kernel can boot abruptly.
Signed-off-by: Keerthy j-keerthy@ti.com Signed-off-by: Bjorn Helgaas bhelgaas@google.com Acked-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/pci/dwc/pci-dra7xx.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c index 7f5dfa169d0f..2e0d0b29cdcb 100644 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -817,6 +817,22 @@ static int dra7xx_pcie_resume_noirq(struct device *dev) } #endif
+void dra7xx_pcie_shutdown(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev); + int ret; + + dra7xx_pcie_stop_link(dra7xx->pci); + + ret = pm_runtime_put_sync(dev); + if (ret < 0) + dev_dbg(dev, "pm_runtime_put_sync failed\n"); + + pm_runtime_disable(dev); + dra7xx_pcie_disable_phy(dra7xx); +} + static const struct dev_pm_ops dra7xx_pcie_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(dra7xx_pcie_suspend, dra7xx_pcie_resume) SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(dra7xx_pcie_suspend_noirq, @@ -830,5 +846,6 @@ static struct platform_driver dra7xx_pcie_driver = { .suppress_bind_attrs = true, .pm = &dra7xx_pcie_pm_ops, }, + .shutdown = dra7xx_pcie_shutdown, }; builtin_platform_driver_probe(dra7xx_pcie_driver, dra7xx_pcie_probe);
From: Kishon Vijay Abraham I kishon@ti.com
commit b7636e816adcb52bc96b6fb7bc9d141cbfd17ddb upstream
pci_disable_msi() throws a Kernel BUG if the driver has successfully requested an IRQ and not released it. Fix it here by freeing IRQs before invoking pci_disable_msi().
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Bjorn Helgaas bhelgaas@google.com Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/misc/pci_endpoint_test.c | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c index 504fa680825d..230f1e8538dc 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -92,6 +92,7 @@ struct pci_endpoint_test { void __iomem *bar[6]; struct completion irq_raised; int last_irq; + int num_irqs; /* mutex to protect the ioctls */ struct mutex mutex; struct miscdevice miscdev; @@ -514,6 +515,7 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev, irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI); if (irq < 0) dev_err(dev, "failed to get MSI interrupts\n"); + test->num_irqs = irq; }
err = devm_request_irq(dev, pdev->irq, pci_endpoint_test_irqhandler, @@ -581,6 +583,9 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev, pci_iounmap(pdev, test->bar[bar]); }
+ for (i = 0; i < irq; i++) + devm_free_irq(dev, pdev->irq + i, test); + err_disable_msi: pci_disable_msi(pdev); pci_release_regions(pdev); @@ -594,6 +599,7 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev, static void pci_endpoint_test_remove(struct pci_dev *pdev) { int id; + int i; enum pci_barno bar; struct pci_endpoint_test *test = pci_get_drvdata(pdev); struct miscdevice *misc_device = &test->miscdev; @@ -609,6 +615,8 @@ static void pci_endpoint_test_remove(struct pci_dev *pdev) if (test->bar[bar]) pci_iounmap(pdev, test->bar[bar]); } + for (i = 0; i < test->num_irqs; i++) + devm_free_irq(&pdev->dev, pdev->irq + i, test); pci_disable_msi(pdev); pci_release_regions(pdev); pci_disable_device(pdev);
From: Sudeep Holla sudeep.holla@arm.com
commit 33cd7123ac0ba5360656ae27db453de5b9aa711f upstream
Currently the mailbox framework sets txdone_method to TXDONE_BY_POLL if the controller sets txdone_by_poll. However some clients can have a mechanism to do TXDONE_BY_ACK which they can specify by knows_txdone. However, we endup setting both TXDONE_BY_POLL and TXDONE_BY_ACK in that case. In such scenario, we may end up with below warnings as the tx ticker is run both by mailbox framework and the client.
WARNING: CPU: 1 PID: 0 at kernel/time/hrtimer.c:805 hrtimer_forward+0x88/0xd8 CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.12.0-rc5 #242 Hardware name: ARM LTD ARM Juno Development Platform task: ffff8009768ca700 task.stack: ffff8009768f8000 PC is at hrtimer_forward+0x88/0xd8 LR is at txdone_hrtimer+0xd4/0xf8 Call trace: hrtimer_forward+0x88/0xd8 __hrtimer_run_queues+0xe4/0x158 hrtimer_interrupt+0xa4/0x220 arch_timer_handler_phys+0x30/0x40 handle_percpu_devid_irq+0x78/0x130 generic_handle_irq+0x24/0x38 __handle_domain_irq+0x5c/0xb8 gic_handle_irq+0x54/0xa8
This patch fixes the issue by resetting TXDONE_BY_POLL if client has set knows_txdone.
Cc: Alexey Klimov alexey.klimov@arm.com Signed-off-by: Sudeep Holla sudeep.holla@arm.com Signed-off-by: Jassi Brar jaswinder.singh@linaro.org Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/mailbox/mailbox.c | 4 ++-- drivers/mailbox/pcc.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mailbox/mailbox.c b/drivers/mailbox/mailbox.c index 44b49a2676f0..055c90b8253c 100644 --- a/drivers/mailbox/mailbox.c +++ b/drivers/mailbox/mailbox.c @@ -351,7 +351,7 @@ struct mbox_chan *mbox_request_channel(struct mbox_client *cl, int index) init_completion(&chan->tx_complete);
if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone) - chan->txdone_method |= TXDONE_BY_ACK; + chan->txdone_method = TXDONE_BY_ACK;
spin_unlock_irqrestore(&chan->lock, flags);
@@ -420,7 +420,7 @@ void mbox_free_channel(struct mbox_chan *chan) spin_lock_irqsave(&chan->lock, flags); chan->cl = NULL; chan->active_req = NULL; - if (chan->txdone_method == (TXDONE_BY_POLL | TXDONE_BY_ACK)) + if (chan->txdone_method == TXDONE_BY_ACK) chan->txdone_method = TXDONE_BY_POLL;
module_put(chan->mbox->dev->driver->owner); diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c index 9b7005e1345e..27c2294be51a 100644 --- a/drivers/mailbox/pcc.c +++ b/drivers/mailbox/pcc.c @@ -266,7 +266,7 @@ struct mbox_chan *pcc_mbox_request_channel(struct mbox_client *cl, init_completion(&chan->tx_complete);
if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone) - chan->txdone_method |= TXDONE_BY_ACK; + chan->txdone_method = TXDONE_BY_ACK;
spin_unlock_irqrestore(&chan->lock, flags);
@@ -312,7 +312,7 @@ void pcc_mbox_free_channel(struct mbox_chan *chan) spin_lock_irqsave(&chan->lock, flags); chan->cl = NULL; chan->active_req = NULL; - if (chan->txdone_method == (TXDONE_BY_POLL | TXDONE_BY_ACK)) + if (chan->txdone_method == TXDONE_BY_ACK) chan->txdone_method = TXDONE_BY_POLL;
spin_unlock_irqrestore(&chan->lock, flags);
From: "Gustavo A. R. Silva" garsilva@embeddedor.com
commit 09fc38c1af4cb888255e9ecf267bf9757c12885d upstream
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through.
Addresses-Coverity-ID: 1195220 Signed-off-by: Gustavo A. R. Silva garsilva@embeddedor.com Signed-off-by: Mark Brown broonie@kernel.org Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- sound/soc/codecs/tlv320aic31xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c index d3bd0bf15ddb..cc95c15ceceb 100644 --- a/sound/soc/codecs/tlv320aic31xx.c +++ b/sound/soc/codecs/tlv320aic31xx.c @@ -941,7 +941,7 @@ static int aic31xx_set_dai_fmt(struct snd_soc_dai *codec_dai, case SND_SOC_DAIFMT_I2S: break; case SND_SOC_DAIFMT_DSP_A: - dsp_a_val = 0x1; + dsp_a_val = 0x1; /* fall through */ case SND_SOC_DAIFMT_DSP_B: /* * NOTE: This CODEC samples on the falling edge of BCLK in
From: Arvind Yadav arvind.yadav.cs@gmail.com
commit 0c8b794c4a10aaf7ac0d4a49be2b2638e2038adb upstream
devm_kasprintf() can fail here and we must check its return value.
Signed-off-by: Arvind Yadav arvind.yadav.cs@gmail.com Acked-by: Peter Ujfalusi peter.ujfalusi@ti.com Signed-off-by: Mark Brown broonie@kernel.org Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- sound/soc/davinci/davinci-mcasp.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 0480ec4c8035..af6cd8b874f5 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -1894,6 +1894,10 @@ static int davinci_mcasp_probe(struct platform_device *pdev) if (irq >= 0) { irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_common", dev_name(&pdev->dev)); + if (!irq_name) { + ret = -ENOMEM; + goto err; + } ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, davinci_mcasp_common_irq_handler, IRQF_ONESHOT | IRQF_SHARED, @@ -1911,6 +1915,10 @@ static int davinci_mcasp_probe(struct platform_device *pdev) if (irq >= 0) { irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_rx", dev_name(&pdev->dev)); + if (!irq_name) { + ret = -ENOMEM; + goto err; + } ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, davinci_mcasp_rx_irq_handler, IRQF_ONESHOT, irq_name, mcasp); @@ -1926,6 +1934,10 @@ static int davinci_mcasp_probe(struct platform_device *pdev) if (irq >= 0) { irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_tx", dev_name(&pdev->dev)); + if (!irq_name) { + ret = -ENOMEM; + goto err; + } ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, davinci_mcasp_tx_irq_handler, IRQF_ONESHOT, irq_name, mcasp);
From: Takashi Iwai tiwai@suse.de
commit befff4fbc27e19b14b343eb4a65d8f75d38b6230 upstream
Don't use BUG_ON() for a non-critical sanity check on production systems. This patch replaces with a softer WARN_ON() and an error path.
Signed-off-by: Takashi Iwai tiwai@suse.de Signed-off-by: Mark Brown broonie@kernel.org Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- sound/soc/davinci/davinci-mcasp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index af6cd8b874f5..b4e6f4a04cb6 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -1748,7 +1748,8 @@ static int davinci_mcasp_get_dma_type(struct davinci_mcasp *mcasp) PTR_ERR(chan)); return PTR_ERR(chan); } - BUG_ON(!chan->device || !chan->device->dev); + if (WARN_ON(!chan->device || !chan->device->dev)) + return -EINVAL;
if (chan->device->dev->of_node) ret = of_property_read_string(chan->device->dev->of_node,
From: Christophe Jaillet christophe.jaillet@wanadoo.fr
commit 1b8b68b05d1868404316d32e20782b00442aba90 upstream
All error handling paths in this function 'goto err' except this one.
If one of the 2 previous memory allocations fails, we should go through the existing error handling path. Otherwise there is an unbalanced pm_runtime_enable()/pm_runtime_disable().
Fixes: dd55ff8346a9 ("ASoC: davinci-mcasp: Add set_tdm_slots() support") Signed-off-by: Christophe JAILLET christophe.jaillet@wanadoo.fr Acked-by: Peter Ujfalusi peter.ujfalusi@ti.com Signed-off-by: Mark Brown broonie@kernel.org Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- sound/soc/davinci/davinci-mcasp.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index b4e6f4a04cb6..07bac9ea65c4 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -2022,8 +2022,10 @@ static int davinci_mcasp_probe(struct platform_device *pdev) GFP_KERNEL);
if (!mcasp->chconstr[SNDRV_PCM_STREAM_PLAYBACK].list || - !mcasp->chconstr[SNDRV_PCM_STREAM_CAPTURE].list) - return -ENOMEM; + !mcasp->chconstr[SNDRV_PCM_STREAM_CAPTURE].list) { + ret = -ENOMEM; + goto err; + }
ret = davinci_mcasp_set_ch_constraints(mcasp); if (ret)
From: Claudio Foellmi claudio.foellmi@ergon.ch
commit 93367bfca98f36cece57c01dbce6ea1b4ac58245 upstream
A very conservative check for bus activity (to prevent interference in multimaster setups) prevented the bus recovery methods from being triggered in the case that SDA or SCL was stuck low. This defeats the purpose of the recovery mechanism, which was introduced for exactly this situation (a slave device keeping SDA pulled down).
Also added a check to make sure SDA is low before attempting recovery. If SDA is not stuck low, recovery will not help, so we can skip it.
Note that bus lockups can persist across reboots. The only other options are to reset or power cycle the offending slave device, and many i2c slaves do not even have a reset pin.
If we see that one of the lines is low for the entire timeout duration, we can actually be sure that there is no other master driving the bus. It is therefore save for us to attempt a bus recovery.
Signed-off-by: Claudio Foellmi claudio.foellmi@ergon.ch Tested-by: Vignesh R vigneshr@ti.com Reviewed-by: Grygorii Strashko grygorii.strashko@ti.com [wsa: fixed one return code to -EBUSY] Signed-off-by: Wolfram Sang wsa@the-dreams.de Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/i2c/busses/i2c-omap.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 12ba183693d6..a03564f41ad0 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -486,6 +486,22 @@ static int omap_i2c_init(struct omap_i2c_dev *omap) return 0; }
+/* + * Try bus recovery, but only if SDA is actually low. + */ +static int omap_i2c_recover_bus(struct omap_i2c_dev *omap) +{ + u16 systest; + + systest = omap_i2c_read_reg(omap, OMAP_I2C_SYSTEST_REG); + if ((systest & OMAP_I2C_SYSTEST_SCL_I_FUNC) && + (systest & OMAP_I2C_SYSTEST_SDA_I_FUNC)) + return 0; /* bus seems to already be fine */ + if (!(systest & OMAP_I2C_SYSTEST_SCL_I_FUNC)) + return -EBUSY; /* recovery would not fix SCL */ + return i2c_recover_bus(&omap->adapter); +} + /* * Waiting on Bus Busy */ @@ -496,7 +512,7 @@ static int omap_i2c_wait_for_bb(struct omap_i2c_dev *omap) timeout = jiffies + OMAP_I2C_TIMEOUT; while (omap_i2c_read_reg(omap, OMAP_I2C_STAT_REG) & OMAP_I2C_STAT_BB) { if (time_after(jiffies, timeout)) - return i2c_recover_bus(&omap->adapter); + return omap_i2c_recover_bus(omap); msleep(1); }
@@ -577,8 +593,13 @@ static int omap_i2c_wait_for_bb_valid(struct omap_i2c_dev *omap) }
if (time_after(jiffies, timeout)) { + /* + * SDA or SCL were low for the entire timeout without + * any activity detected. Most likely, a slave is + * locking up the bus with no master driving the clock. + */ dev_warn(omap->dev, "timeout waiting for bus ready\n"); - return -ETIMEDOUT; + return omap_i2c_recover_bus(omap); }
msleep(1);
From: Zumeng Chen zumeng.chen@gmail.com
commit 248aefdcc3a7e0cfbd014946b4dead63e750e71b upstream
call of_node_put to release the refcount of np.
Signed-off-by: Zumeng Chen zumeng.chen@gmail.com Acked-by: Viresh Kumar viresh.kumar@linaro.org Signed-off-by: Rafael J. Wysocki rafael.j.wysocki@intel.com Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/cpufreq/ti-cpufreq.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c index 4bf47de6101f..cadc324bedb4 100644 --- a/drivers/cpufreq/ti-cpufreq.c +++ b/drivers/cpufreq/ti-cpufreq.c @@ -205,6 +205,7 @@ static int ti_cpufreq_init(void)
np = of_find_node_by_path("/"); match = of_match_node(ti_cpufreq_of_match, np); + of_node_put(np); if (!match) return -ENODEV;
On Thu, Sep 05, 2019 at 10:17:41AM -0600, Mathieu Poirier wrote:
These patches are backport candidates picked out of TI's 4.14.y tree [1], with most of them already found in the 4.19.y stable tree.
Could you please update your scripting that only the cover-letter and I2C related patches will be sent to the I2C mailing list?
linux-stable-mirror@lists.linaro.org
-
Greg KH -
Mathieu Poirier -
Wolfram Sang