SoCs containing 0x14CA are present both in datacenter parts that support SEV as well as client parts that support TEE.
Cc: stable@vger.kernel.org # 5.15+ Tested-by: Rijo-john Thomas Rijo-john.Thomas@amd.com Signed-off-by: Mario Limonciello mario.limonciello@amd.com --- drivers/crypto/ccp/sp-pci.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index 792d6da7f0c0..084d052fddcc 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -381,6 +381,15 @@ static const struct psp_vdata pspv3 = { .inten_reg = 0x10690, .intsts_reg = 0x10694, }; + +static const struct psp_vdata pspv4 = { + .sev = &sevv2, + .tee = &teev1, + .feature_reg = 0x109fc, + .inten_reg = 0x10690, + .intsts_reg = 0x10694, +}; + #endif
static const struct sp_dev_vdata dev_vdata[] = { @@ -426,7 +435,7 @@ static const struct sp_dev_vdata dev_vdata[] = { { /* 5 */ .bar = 2, #ifdef CONFIG_CRYPTO_DEV_SP_PSP - .psp_vdata = &pspv2, + .psp_vdata = &pspv4, #endif }, { /* 6 */
On 9/28/22 13:45, Mario Limonciello wrote:
SoCs containing 0x14CA are present both in datacenter parts that support SEV as well as client parts that support TEE.
Cc: stable@vger.kernel.org # 5.15+ Tested-by: Rijo-john Thomas Rijo-john.Thomas@amd.com Signed-off-by: Mario Limonciello mario.limonciello@amd.com
Acked-by: Tom Lendacky thomas.lendacky@amd.com
drivers/crypto/ccp/sp-pci.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index 792d6da7f0c0..084d052fddcc 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -381,6 +381,15 @@ static const struct psp_vdata pspv3 = { .inten_reg = 0x10690, .intsts_reg = 0x10694, };
+static const struct psp_vdata pspv4 = {
- .sev = &sevv2,
- .tee = &teev1,
- .feature_reg = 0x109fc,
- .inten_reg = 0x10690,
- .intsts_reg = 0x10694,
+};
- #endif
static const struct sp_dev_vdata dev_vdata[] = { @@ -426,7 +435,7 @@ static const struct sp_dev_vdata dev_vdata[] = { { /* 5 */ .bar = 2, #ifdef CONFIG_CRYPTO_DEV_SP_PSP
.psp_vdata = &pspv2,
.psp_vdata = &pspv4,
[Public]
-----Original Message----- From: Limonciello, Mario Mario.Limonciello@amd.com Sent: Wednesday, September 28, 2022 13:45 To: Limonciello, Mario Mario.Limonciello@amd.com; Lendacky, Thomas Thomas.Lendacky@amd.com; Allen, John John.Allen@amd.com Cc: stable@vger.kernel.org; Thomas, Rijo-john <Rijo- john.Thomas@amd.com>; Herbert Xu herbert@gondor.apana.org.au; David S. Miller davem@davemloft.net; linux-crypto@vger.kernel.org; linux-kernel@vger.kernel.org Subject: [PATCH] crypto: ccp: Add support for TEE for PCI ID 0x14CA
SoCs containing 0x14CA are present both in datacenter parts that support SEV as well as client parts that support TEE.
Cc: stable@vger.kernel.org # 5.15+ Tested-by: Rijo-john Thomas Rijo-john.Thomas@amd.com Signed-off-by: Mario Limonciello mario.limonciello@amd.com
drivers/crypto/ccp/sp-pci.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index 792d6da7f0c0..084d052fddcc 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -381,6 +381,15 @@ static const struct psp_vdata pspv3 = { .inten_reg = 0x10690, .intsts_reg = 0x10694, };
+static const struct psp_vdata pspv4 = {
- .sev = &sevv2,
- .tee = &teev1,
- .feature_reg = 0x109fc,
- .inten_reg = 0x10690,
- .intsts_reg = 0x10694,
+};
#endif
static const struct sp_dev_vdata dev_vdata[] = { @@ -426,7 +435,7 @@ static const struct sp_dev_vdata dev_vdata[] = { { /* 5 */ .bar = 2, #ifdef CONFIG_CRYPTO_DEV_SP_PSP
.psp_vdata = &pspv2,
.psp_vdata = &pspv4,#endif }, { /* 6 */ -- 2.34.1
Herbert,
I noticed you sent out the 6.1 PR already. So I Just wanted to make sure this didn't get overlooked as it's already got a T-b/A-b.
Thanks!
On Fri, Oct 07, 2022 at 08:24:06PM +0000, Limonciello, Mario wrote:
I noticed you sent out the 6.1 PR already. So I Just wanted to make sure this didn't get overlooked as it's already got a T-b/A-b.
Hi Mario:
This didn't make the deadline for inclusion in my 6.1 PR. Is there any reason why it has to go in this merge window rather than the next?
Thanks,
On 10/12/22 04:31, Herbert Xu wrote:
On Fri, Oct 07, 2022 at 08:24:06PM +0000, Limonciello, Mario wrote:
I noticed you sent out the 6.1 PR already. So I Just wanted to make sure this didn't get overlooked as it's already got a T-b/A-b.
Hi Mario:
This didn't make the deadline for inclusion in my 6.1 PR. Is there any reason why it has to go in this merge window rather than the next?
Thanks,
Some other maintainers take new IDs as fixes. Particularly when they're good candidates for cc stable.
The main reason I wanted to see it sooner is so that it has more time to percolate to the various downstream distros so that errors stemming from the lack of this ID declaration aren't prevalent when using this SOC.
On Wed, Oct 12, 2022 at 07:42:32AM -0500, Mario Limonciello wrote:
Some other maintainers take new IDs as fixes. Particularly when they're good candidates for cc stable.
The main reason I wanted to see it sooner is so that it has more time to percolate to the various downstream distros so that errors stemming from the lack of this ID declaration aren't prevalent when using this SOC.
Sorry but this is not persuasive enough for me. If you want a patch to make a particular merge window, make sure that you get it in early enough.
Cheers,
[Public]
-----Original Message----- From: Herbert Xu herbert@gondor.apana.org.au Sent: Wednesday, October 12, 2022 20:56 To: Limonciello, Mario Mario.Limonciello@amd.com Cc: stable@vger.kernel.org; Thomas, Rijo-john <Rijo- john.Thomas@amd.com>; David S. Miller davem@davemloft.net; linux- crypto@vger.kernel.org; linux-kernel@vger.kernel.org; Lendacky, Thomas Thomas.Lendacky@amd.com; Allen, John John.Allen@amd.com Subject: Re: [PATCH] crypto: ccp: Add support for TEE for PCI ID 0x14CA
On Wed, Oct 12, 2022 at 07:42:32AM -0500, Mario Limonciello wrote:
Some other maintainers take new IDs as fixes. Particularly when they're good candidates for cc stable.
The main reason I wanted to see it sooner is so that it has more time to percolate to the various downstream distros so that errors stemming from
the
lack of this ID declaration aren't prevalent when using this SOC.
Sorry but this is not persuasive enough for me. If you want a patch to make a particular merge window, make sure that you get it in early enough.
OK thanks!
On Wed, Sep 28, 2022 at 01:45:05PM -0500, Mario Limonciello wrote:
SoCs containing 0x14CA are present both in datacenter parts that support SEV as well as client parts that support TEE.
Cc: stable@vger.kernel.org # 5.15+ Tested-by: Rijo-john Thomas Rijo-john.Thomas@amd.com Signed-off-by: Mario Limonciello mario.limonciello@amd.com
drivers/crypto/ccp/sp-pci.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
Patch applied. Thanks.
linux-stable-mirror@lists.linaro.org
-
Herbert Xu -
Limonciello, Mario -
Mario Limonciello
-
Tom Lendacky