From: Max Uvarov muvarov@gmail.com
Commit 333061b924539c0de081339643f45514f5f1c1e6 upstream.
For supporting 10Mps speed in SGMII mode DP83867_10M_SGMII_RATE_ADAPT bit of DP83867_10M_SGMII_CFG register has to be cleared by software. That does not affect speeds 100 and 1000 so can be done on init.
Signed-off-by: Max Uvarov muvarov@gmail.com Cc: Heiner Kallweit hkallweit1@gmail.com Cc: Florian Fainelli f.fainelli@gmail.com Cc: Andrew Lunn andrew@lunn.ch Signed-off-by: David S. Miller davem@davemloft.net [ adapted for kernels without phy_modify_mmd ] Signed-off-by: Adrian Bunk bunk@kernel.org --- - already in 5.3 - applies and builds against 4.14 and 4.19 - tested with 4.14 --- drivers/net/phy/dp83867.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 12b09e6e03ba..81106314e6da 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -37,6 +37,8 @@ #define DP83867_STRAP_STS1 0x006E #define DP83867_RGMIIDCTL 0x0086 #define DP83867_IO_MUX_CFG 0x0170 +#define DP83867_10M_SGMII_CFG 0x016F +#define DP83867_10M_SGMII_RATE_ADAPT_MASK BIT(7)
#define DP83867_SW_RESET BIT(15) #define DP83867_SW_RESTART BIT(14) @@ -283,6 +285,23 @@ static int dp83867_config_init(struct phy_device *phydev) } }
+ if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { + /* For support SPEED_10 in SGMII mode + * DP83867_10M_SGMII_RATE_ADAPT bit + * has to be cleared by software. That + * does not affect SPEED_100 and + * SPEED_1000. + */ + val = phy_read_mmd(phydev, DP83867_DEVADDR, + DP83867_10M_SGMII_CFG); + val &= ~DP83867_10M_SGMII_RATE_ADAPT_MASK; + ret = phy_write_mmd(phydev, DP83867_DEVADDR, + DP83867_10M_SGMII_CFG, val); + + if (ret) + return ret; + } + /* Enable Interrupt output INT_OE in CFG3 register */ if (phy_interrupt_is_valid(phydev)) { val = phy_read(phydev, DP83867_CFG3);
From: Max Uvarov muvarov@gmail.com
Commit 1a97a477e666cbdededab93bd3754e508f0c09d7 upstream.
After reset SGMII Autoneg timer is set to 2us (bits 6 and 5 are 01). That is not enough to finalize autonegatiation on some devices. Increase this timer duration to maximum supported 16ms.
Signed-off-by: Max Uvarov muvarov@gmail.com Cc: Heiner Kallweit hkallweit1@gmail.com Cc: Florian Fainelli f.fainelli@gmail.com Cc: Andrew Lunn andrew@lunn.ch Signed-off-by: David S. Miller davem@davemloft.net [ adapted for kernels without phy_modify_mmd ] Signed-off-by: Adrian Bunk bunk@kernel.org --- - already in 5.3 - applies and builds against 4.14 and 4.19 - tested with 4.14 --- drivers/net/phy/dp83867.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 81106314e6da..e03e91d5f1b1 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -33,6 +33,12 @@
/* Extended Registers */ #define DP83867_CFG4 0x0031 +#define DP83867_CFG4_SGMII_ANEG_MASK (BIT(5) | BIT(6)) +#define DP83867_CFG4_SGMII_ANEG_TIMER_11MS (3 << 5) +#define DP83867_CFG4_SGMII_ANEG_TIMER_800US (2 << 5) +#define DP83867_CFG4_SGMII_ANEG_TIMER_2US (1 << 5) +#define DP83867_CFG4_SGMII_ANEG_TIMER_16MS (0 << 5) + #define DP83867_RGMIICTL 0x0032 #define DP83867_STRAP_STS1 0x006E #define DP83867_RGMIIDCTL 0x0086 @@ -300,6 +306,18 @@ static int dp83867_config_init(struct phy_device *phydev)
if (ret) return ret; + + /* After reset SGMII Autoneg timer is set to 2us (bits 6 and 5 + * are 01). That is not enough to finalize autoneg on some + * devices. Increase this timer duration to maximum 16ms. + */ + val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4); + val &= ~DP83867_CFG4_SGMII_ANEG_MASK; + val |= DP83867_CFG4_SGMII_ANEG_TIMER_16MS; + ret = phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val); + + if (ret) + return ret; }
/* Enable Interrupt output INT_OE in CFG3 register */
On Tue, Nov 26, 2019 at 04:04:05PM +0200, Adrian Bunk wrote:
From: Max Uvarov muvarov@gmail.com
Commit 333061b924539c0de081339643f45514f5f1c1e6 upstream.
For supporting 10Mps speed in SGMII mode DP83867_10M_SGMII_RATE_ADAPT bit of DP83867_10M_SGMII_CFG register has to be cleared by software. That does not affect speeds 100 and 1000 so can be done on init.
Signed-off-by: Max Uvarov muvarov@gmail.com Cc: Heiner Kallweit hkallweit1@gmail.com Cc: Florian Fainelli f.fainelli@gmail.com Cc: Andrew Lunn andrew@lunn.ch Signed-off-by: David S. Miller davem@davemloft.net [ adapted for kernels without phy_modify_mmd ] Signed-off-by: Adrian Bunk bunk@kernel.org
- already in 5.3
- applies and builds against 4.14 and 4.19
- tested with 4.14
Looks like Greg took these in, thanks!
linux-stable-mirror@lists.linaro.org
-
Adrian Bunk -
Sasha Levin