The patch below does not apply to the 6.1-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to stable@vger.kernel.org.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.1.y git checkout FETCH_HEAD git cherry-pick -x 1c5c36530a573de1a4b647b7d8c36f3b298e60ed # <resolve conflicts, build, test, etc.> git commit -s git send-email --to 'stable@vger.kernel.org' --in-reply-to '2024061927-scholar-reapprove-9500@gregkh' --subject-prefix 'PATCH 6.1.y' HEAD^..

Possible dependencies:

1c5c36530a57 ("drm/amd/display: Set DCN351 BB and IP the same as DCN35") 115009d11ccf ("drm/amd/display: Add DCN35 DML2 support") 7966f319c66d ("drm/amd/display: Introduce DML2") 6e2c4941ce0c ("drm/amd/display: Move dml code under CONFIG_DRM_AMD_DC_FP guard") c51d87202d1f ("drm/amd/display: do not attempt ODM power optimization if minimal transition doesn't exist") 1cb87e048975 ("drm/amd/display: Add DCN35 blocks to Makefile") 0fa45b6aeae4 ("drm/amd/display: Add DCN35 Resource") 39d39a019657 ("drm/amd/display: switch to new ODM policy for windowed MPO ODM support") 0b9dc439f404 ("drm/amd/display: Write flip addr to scratch reg for subvp") 96182df99dad ("drm/amd/display: Enable runtime register offset init for DCN32 DMUB") ca030d83f53b ("drm/amd/display: always acquire MPO pipe for every blending tree") 71ba6b577a35 ("drm/amd/display: Add interface to enable DPIA trace") 70e64c4d522b ("drm/amd: Disable S/G for APUs when 64GB or more host memory") 3d00c59d1477 ("Merge tag 'amd-drm-next-6.6-2023-07-28' of https://gitlab.freedesktop.org/agd5f/linux into drm-next")

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From 1c5c36530a573de1a4b647b7d8c36f3b298e60ed Mon Sep 17 00:00:00 2001 From: Xi Liu xi.liu@amd.com Date: Tue, 27 Feb 2024 13:39:00 -0500 Subject: [PATCH] drm/amd/display: Set DCN351 BB and IP the same as DCN35

[WHY & HOW] DCN351 and DCN35 should use the same bounding box and IP settings.

Cc: Mario Limonciello mario.limonciello@amd.com Cc: Alex Deucher alexander.deucher@amd.com Cc: stable@vger.kernel.org Reviewed-by: Jun Lei jun.lei@amd.com Acked-by: Alex Hung alex.hung@amd.com Signed-off-by: Xi Liu xi.liu@amd.com Tested-by: Daniel Wheeler daniel.wheeler@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c index cf98411d0799..151b480b3cea 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c @@ -229,17 +229,13 @@ void dml2_init_socbb_params(struct dml2_context *dml2, const struct dc *in_dc, s break;

case dml_project_dcn35: + case dml_project_dcn351: out->num_chans = 4; out->round_trip_ping_latency_dcfclk_cycles = 106; out->smn_latency_us = 2; out->dispclk_dppclk_vco_speed_mhz = 3600; break;

- case dml_project_dcn351: - out->num_chans = 16; - out->round_trip_ping_latency_dcfclk_cycles = 1100; - out->smn_latency_us = 2; - break; } /* ---Overrides if available--- */ if (dml2->config.bbox_overrides.dram_num_chan)