Even if we don't have the correct clock and get a warning, we should not skip the return.
Fixes: 1fa11ee2d9d0 ("drm/i915/icl: start adding the TBT pll") Cc: Paulo Zanoni paulo.r.zanoni@intel.com Cc: stable@vger.kernel.org # v4.19+ Signed-off-by: Lucas De Marchi lucas.demarchi@intel.com --- drivers/gpu/drm/i915/intel_ddi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 8dbf6c9e22fb..4dc03e8c6c10 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1021,7 +1021,7 @@ static uint32_t icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder, return DDI_CLK_SEL_TBT_810; default: MISSING_CASE(clock); - break; + return DDI_CLK_SEL_NONE; } case DPLL_ID_ICL_MGPLL1: case DPLL_ID_ICL_MGPLL2:
Patch look ok to me.
On Thu, 2019-01-17 at 12:21 -0800, Lucas De Marchi wrote:
Even if we don't have the correct clock and get a warning, we should not skip the return.
Fixes: 1fa11ee2d9d0 ("drm/i915/icl: start adding the TBT pll") Cc: Paulo Zanoni paulo.r.zanoni@intel.com Cc: stable@vger.kernel.org # v4.19+
Reviewed-by: Mika Kahola mika.kahola@intel.com
Signed-off-by: Lucas De Marchi lucas.demarchi@intel.com
drivers/gpu/drm/i915/intel_ddi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 8dbf6c9e22fb..4dc03e8c6c10 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1021,7 +1021,7 @@ static uint32_t icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder, return DDI_CLK_SEL_TBT_810; default: MISSING_CASE(clock);
break;
} case DPLL_ID_ICL_MGPLL1: case DPLL_ID_ICL_MGPLL2:return DDI_CLK_SEL_NONE;
The subject of this patch could really be bit more specific "... on DDI clock selection".
Regards, Joonas
Quoting Lucas De Marchi (2019-01-17 22:21:10)
Even if we don't have the correct clock and get a warning, we should not skip the return.
Fixes: 1fa11ee2d9d0 ("drm/i915/icl: start adding the TBT pll") Cc: Paulo Zanoni paulo.r.zanoni@intel.com Cc: stable@vger.kernel.org # v4.19+ Signed-off-by: Lucas De Marchi lucas.demarchi@intel.com
drivers/gpu/drm/i915/intel_ddi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 8dbf6c9e22fb..4dc03e8c6c10 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1021,7 +1021,7 @@ static uint32_t icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder, return DDI_CLK_SEL_TBT_810; default: MISSING_CASE(clock);
break;
return DDI_CLK_SEL_NONE; } case DPLL_ID_ICL_MGPLL1: case DPLL_ID_ICL_MGPLL2:
-- 2.20.0
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On Wed, Jan 23, 2019 at 04:19:30PM +0200, Joonas Lahtinen wrote:
The subject of this patch could really be bit more specific "... on DDI clock selection".
Fixed. I'll wait for reviews on other patches to re-spin this series as it's already conflicting.
thanks Lucas De Marchi
Regards, Joonas
Quoting Lucas De Marchi (2019-01-17 22:21:10)
Even if we don't have the correct clock and get a warning, we should not skip the return.
Fixes: 1fa11ee2d9d0 ("drm/i915/icl: start adding the TBT pll") Cc: Paulo Zanoni paulo.r.zanoni@intel.com Cc: stable@vger.kernel.org # v4.19+ Signed-off-by: Lucas De Marchi lucas.demarchi@intel.com
drivers/gpu/drm/i915/intel_ddi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 8dbf6c9e22fb..4dc03e8c6c10 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1021,7 +1021,7 @@ static uint32_t icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder, return DDI_CLK_SEL_TBT_810; default: MISSING_CASE(clock);
break;
return DDI_CLK_SEL_NONE; } case DPLL_ID_ICL_MGPLL1: case DPLL_ID_ICL_MGPLL2:
-- 2.20.0
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