- Fix build error due to 64-by-32 division - Additional check for adma max page
Mohan Kumar D (2): dmaengine: tegra210-adma: Fix build error due to 64-by-32 division dmaengine: tegra210-adma: check for adma max page
drivers/dma/tegra210-adma.c | 19 ++++++++++++++++--- drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 2 +- 2 files changed, 17 insertions(+), 4 deletions(-)
Kernel test robot reported the build errors on 32-bit platforms due to plain 64-by-32 division. Following build erros were reported.
"ERROR: modpost: "__udivdi3" [drivers/dma/tegra210-adma.ko] undefined! ld: drivers/dma/tegra210-adma.o: in function `tegra_adma_probe': tegra210-adma.c:(.text+0x12cf): undefined reference to `__udivdi3'"
This can be fixed by using lower_32_bits() for the adma address space as the offset is constrained to the lower 32 bits
Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page") Cc: stable@vger.kernel.org Reported-by: kernel test robot lkp@intel.com Closes: https://lore.kernel.org/oe-kbuild-all/202412250204.GCQhdKe3-lkp@intel.com/ Signed-off-by: Mohan Kumar D mkumard@nvidia.com --- drivers/dma/tegra210-adma.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c index 6896da8ac7ef..258220c9cb50 100644 --- a/drivers/dma/tegra210-adma.c +++ b/drivers/dma/tegra210-adma.c @@ -887,7 +887,8 @@ static int tegra_adma_probe(struct platform_device *pdev) const struct tegra_adma_chip_data *cdata; struct tegra_adma *tdma; struct resource *res_page, *res_base; - int ret, i, page_no; + unsigned int page_no, page_offset; + int ret, i;
cdata = of_device_get_match_data(&pdev->dev); if (!cdata) { @@ -914,9 +915,16 @@ static int tegra_adma_probe(struct platform_device *pdev)
res_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "global"); if (res_base) { - page_no = (res_page->start - res_base->start) / cdata->ch_base_offset; - if (page_no <= 0) + if (WARN_ON(lower_32_bits(res_page->start) <= + lower_32_bits(res_base->start))) + return -EINVAL; + + page_offset = lower_32_bits(res_page->start) - + lower_32_bits(res_base->start); + page_no = page_offset / cdata->ch_base_offset; + if (page_no == 0) return -EINVAL; + tdma->ch_page_no = page_no - 1; tdma->base_addr = devm_ioremap_resource(&pdev->dev, res_base); if (IS_ERR(tdma->base_addr))
Have additional check for max channel page during the probe to cover if any offset overshoot happens due to wrong DT configuration.
Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page") Cc: stable@vger.kernel.org Signed-off-by: Mohan Kumar D mkumard@nvidia.com --- drivers/dma/tegra210-adma.c | 7 ++++++- drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c index 258220c9cb50..393e8a8a5bc1 100644 --- a/drivers/dma/tegra210-adma.c +++ b/drivers/dma/tegra210-adma.c @@ -83,7 +83,9 @@ struct tegra_adma; * @nr_channels: Number of DMA channels available. * @ch_fifo_size_mask: Mask for FIFO size field. * @sreq_index_offset: Slave channel index offset. + * @max_page: Maximum ADMA Channel Page. * @has_outstanding_reqs: If DMA channel can have outstanding requests. + * @set_global_pg_config: Global page programming. */ struct tegra_adma_chip_data { unsigned int (*adma_get_burst_config)(unsigned int burst_size); @@ -99,6 +101,7 @@ struct tegra_adma_chip_data { unsigned int nr_channels; unsigned int ch_fifo_size_mask; unsigned int sreq_index_offset; + unsigned int max_page; bool has_outstanding_reqs; void (*set_global_pg_config)(struct tegra_adma *tdma); }; @@ -854,6 +857,7 @@ static const struct tegra_adma_chip_data tegra210_chip_data = { .nr_channels = 22, .ch_fifo_size_mask = 0xf, .sreq_index_offset = 2, + .max_page = 0, .has_outstanding_reqs = false, .set_global_pg_config = NULL, }; @@ -871,6 +875,7 @@ static const struct tegra_adma_chip_data tegra186_chip_data = { .nr_channels = 32, .ch_fifo_size_mask = 0x1f, .sreq_index_offset = 4, + .max_page = 4, .has_outstanding_reqs = true, .set_global_pg_config = tegra186_adma_global_page_config, }; @@ -922,7 +927,7 @@ static int tegra_adma_probe(struct platform_device *pdev) page_offset = lower_32_bits(res_page->start) - lower_32_bits(res_base->start); page_no = page_offset / cdata->ch_base_offset; - if (page_no == 0) + if (page_no == 0 || page_no > cdata->max_page) return -EINVAL;
tdma->ch_page_no = page_no - 1; diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c index 45004f598e4d..2af939bab62b 100644 --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c @@ -466,7 +466,7 @@ static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK, cfg->pll_div_regs[2] >> 4), phy->regs + PHY_REG(21));
- fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); + //fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg);
writeb(REG33_FIX_DA | REG33_MODE_SET_DONE, phy->regs + PHY_REG(33));
On 16/01/2025 15:52, Mohan Kumar D wrote:
Have additional check for max channel page during the probe to cover if any offset overshoot happens due to wrong DT configuration.
Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page") Cc: stable@vger.kernel.org Signed-off-by: Mohan Kumar D mkumard@nvidia.com
drivers/dma/tegra210-adma.c | 7 ++++++- drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c index 258220c9cb50..393e8a8a5bc1 100644 --- a/drivers/dma/tegra210-adma.c +++ b/drivers/dma/tegra210-adma.c @@ -83,7 +83,9 @@ struct tegra_adma;
- @nr_channels: Number of DMA channels available.
- @ch_fifo_size_mask: Mask for FIFO size field.
- @sreq_index_offset: Slave channel index offset.
- @max_page: Maximum ADMA Channel Page.
- @has_outstanding_reqs: If DMA channel can have outstanding requests.
*/ struct tegra_adma_chip_data { unsigned int (*adma_get_burst_config)(unsigned int burst_size);
- @set_global_pg_config: Global page programming.
@@ -99,6 +101,7 @@ struct tegra_adma_chip_data { unsigned int nr_channels; unsigned int ch_fifo_size_mask; unsigned int sreq_index_offset;
- unsigned int max_page; bool has_outstanding_reqs; void (*set_global_pg_config)(struct tegra_adma *tdma); };
@@ -854,6 +857,7 @@ static const struct tegra_adma_chip_data tegra210_chip_data = { .nr_channels = 22, .ch_fifo_size_mask = 0xf, .sreq_index_offset = 2,
- .max_page = 0, .has_outstanding_reqs = false, .set_global_pg_config = NULL, };
@@ -871,6 +875,7 @@ static const struct tegra_adma_chip_data tegra186_chip_data = { .nr_channels = 32, .ch_fifo_size_mask = 0x1f, .sreq_index_offset = 4,
- .max_page = 4, .has_outstanding_reqs = true, .set_global_pg_config = tegra186_adma_global_page_config, };
@@ -922,7 +927,7 @@ static int tegra_adma_probe(struct platform_device *pdev) page_offset = lower_32_bits(res_page->start) - lower_32_bits(res_base->start); page_no = page_offset / cdata->ch_base_offset;
if (page_no == 0)
if (page_no == 0 || page_no > cdata->max_page) return -EINVAL;tdma->ch_page_no = page_no - 1; diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c index 45004f598e4d..2af939bab62b 100644 --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c @@ -466,7 +466,7 @@ static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK, cfg->pll_div_regs[2] >> 4), phy->regs + PHY_REG(21));
- fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg);
- //fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg);
Looks like we need a V3!
Jon
On 16-01-2025 21:24, Jon Hunter wrote:
On 16/01/2025 15:52, Mohan Kumar D wrote:
Have additional check for max channel page during the probe to cover if any offset overshoot happens due to wrong DT configuration.
Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page") Cc: stable@vger.kernel.org Signed-off-by: Mohan Kumar D mkumard@nvidia.com
drivers/dma/tegra210-adma.c | 7 ++++++- drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c index 258220c9cb50..393e8a8a5bc1 100644 --- a/drivers/dma/tegra210-adma.c +++ b/drivers/dma/tegra210-adma.c @@ -83,7 +83,9 @@ struct tegra_adma; * @nr_channels: Number of DMA channels available. * @ch_fifo_size_mask: Mask for FIFO size field. * @sreq_index_offset: Slave channel index offset.
- @max_page: Maximum ADMA Channel Page.
* @has_outstanding_reqs: If DMA channel can have outstanding requests.
- @set_global_pg_config: Global page programming.
*/ struct tegra_adma_chip_data { unsigned int (*adma_get_burst_config)(unsigned int burst_size); @@ -99,6 +101,7 @@ struct tegra_adma_chip_data { unsigned int nr_channels; unsigned int ch_fifo_size_mask; unsigned int sreq_index_offset; + unsigned int max_page; bool has_outstanding_reqs; void (*set_global_pg_config)(struct tegra_adma *tdma); }; @@ -854,6 +857,7 @@ static const struct tegra_adma_chip_data tegra210_chip_data = { .nr_channels = 22, .ch_fifo_size_mask = 0xf, .sreq_index_offset = 2, + .max_page = 0, .has_outstanding_reqs = false, .set_global_pg_config = NULL, }; @@ -871,6 +875,7 @@ static const struct tegra_adma_chip_data tegra186_chip_data = { .nr_channels = 32, .ch_fifo_size_mask = 0x1f, .sreq_index_offset = 4, + .max_page = 4, .has_outstanding_reqs = true, .set_global_pg_config = tegra186_adma_global_page_config, }; @@ -922,7 +927,7 @@ static int tegra_adma_probe(struct platform_device *pdev) page_offset = lower_32_bits(res_page->start) - lower_32_bits(res_base->start); page_no = page_offset / cdata->ch_base_offset; - if (page_no == 0) + if (page_no == 0 || page_no > cdata->max_page) return -EINVAL; tdma->ch_page_no = page_no - 1; diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c index 45004f598e4d..2af939bab62b 100644 --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c @@ -466,7 +466,7 @@ static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK, cfg->pll_div_regs[2] >> 4), phy->regs + PHY_REG(21)); - fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); + //fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg);
Looks like we need a V3!
Oops! My bad, will remove this unwanted line change.
Jon
linux-stable-mirror@lists.linaro.org
-
Jon Hunter -
Mohan Kumar D