Tegra194 supports maximum 64K bytes transfer per packet. Tegra186 and prior supports maximum 4K bytes transfer per packet.
This includes 12 bytes of packet header and this limit is applicable irrespective of PIO or DMA mode transfers.
This patch fixes max write length to account for packet header size for transfers.
Cc: stable@vger.kernel.org
Signed-off-by: Sowjanya Komatineni skomatineni@nvidia.com --- [V16/V17] : I2C core max message size is 65536. So, max_read_len of 65535 is NOP. Removed it leaving max_write_len [V15] : This is new patch in this series.
drivers/i2c/busses/i2c-tegra.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 3758c7a2c781..e4bf85e8dc14 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -125,6 +125,9 @@ #define I2C_MST_FIFO_STATUS_TX_MASK 0xff0000 #define I2C_MST_FIFO_STATUS_TX_SHIFT 16
+/* Packet header size in bytes */ +#define I2C_PACKET_HEADER_SIZE 12 + /* * msg_end_type: The bus control which need to be send at end of transfer. * @MSG_END_STOP: Send stop pulse at end of transfer. @@ -899,12 +902,13 @@ static const struct i2c_algorithm tegra_i2c_algo = { /* payload size is only 12 bit */ static const struct i2c_adapter_quirks tegra_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN, - .max_read_len = 4096, - .max_write_len = 4096, + .max_read_len = SZ_4K, + .max_write_len = SZ_4K - I2C_PACKET_HEADER_SIZE, };
static const struct i2c_adapter_quirks tegra194_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN, + .max_write_len = 65535 - I2C_PACKET_HEADER_SIZE, };
static const struct tegra_i2c_hw_feature tegra20_i2c_hw = {
08.02.2019 20:49, Sowjanya Komatineni пишет:
Tegra194 supports maximum 64K bytes transfer per packet. Tegra186 and prior supports maximum 4K bytes transfer per packet.
This includes 12 bytes of packet header and this limit is applicable irrespective of PIO or DMA mode transfers.
This patch fixes max write length to account for packet header size for transfers.
Cc: stable@vger.kernel.org
Signed-off-by: Sowjanya Komatineni skomatineni@nvidia.com
[V16/V17] : I2C core max message size is 65536. So, max_read_len of 65535 is NOP. Removed it leaving max_write_len [V15] : This is new patch in this series.
drivers/i2c/busses/i2c-tegra.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 3758c7a2c781..e4bf85e8dc14 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -125,6 +125,9 @@ #define I2C_MST_FIFO_STATUS_TX_MASK 0xff0000 #define I2C_MST_FIFO_STATUS_TX_SHIFT 16 +/* Packet header size in bytes */ +#define I2C_PACKET_HEADER_SIZE 12
/*
- msg_end_type: The bus control which need to be send at end of transfer.
- @MSG_END_STOP: Send stop pulse at end of transfer.
@@ -899,12 +902,13 @@ static const struct i2c_algorithm tegra_i2c_algo = { /* payload size is only 12 bit */ static const struct i2c_adapter_quirks tegra_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN,
- .max_read_len = 4096,
- .max_write_len = 4096,
- .max_read_len = SZ_4K,
- .max_write_len = SZ_4K - I2C_PACKET_HEADER_SIZE,
}; static const struct i2c_adapter_quirks tegra194_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN,
- .max_write_len = 65535 - I2C_PACKET_HEADER_SIZE,
Ideally it should be SZ_64K - I2C_PACKET_HEADER_SIZE to not miss the one byte, otherwise good to me:
Reviewed-by: Dmitry Osipenko digetx@gmail.com
static const struct i2c_adapter_quirks tegra194_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN,
- .max_write_len = 65535 - I2C_PACKET_HEADER_SIZE,
Ideally it should be SZ_64K - I2C_PACKET_HEADER_SIZE to not miss the one byte, otherwise good to me:
Reviewed-by: Dmitry Osipenko digetx@gmail.com
With SZ_64K - I2C_PACKET_HEADR_Size, When we compute dma_buf_size = max_write_len + I2C_PACKET_HEADER_SIZE, dma_buf_size will be SZ_64K which is 0x10000 apbdma dma count limit should be < 64K meaning 65535 max is allowed
08.02.2019 21:17, Sowjanya Komatineni пишет:
static const struct i2c_adapter_quirks tegra194_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN,
- .max_write_len = 65535 - I2C_PACKET_HEADER_SIZE,
Ideally it should be SZ_64K - I2C_PACKET_HEADER_SIZE to not miss the one byte, otherwise good to me:
Reviewed-by: Dmitry Osipenko digetx@gmail.com
With SZ_64K - I2C_PACKET_HEADR_Size, When we compute dma_buf_size = max_write_len + I2C_PACKET_HEADER_SIZE, dma_buf_size will be SZ_64K which is 0x10000 apbdma dma count limit should be < 64K meaning 65535 max is allowed
But it's for the GPCDMA, does it have the same 64K limit as APB DMA?
static const struct i2c_adapter_quirks tegra194_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN,
- .max_write_len = 65535 - I2C_PACKET_HEADER_SIZE,
Ideally it should be SZ_64K - I2C_PACKET_HEADER_SIZE to not miss the one byte, otherwise good to me:
Reviewed-by: Dmitry Osipenko digetx@gmail.com
With SZ_64K - I2C_PACKET_HEADR_Size, When we compute dma_buf_size = max_write_len + I2C_PACKET_HEADER_SIZE, dma_buf_size will be SZ_64K which is 0x10000 apbdma dma count limit should be < 64K meaning 65535 max is allowed
But it's for the GPCDMA, does it have the same 64K limit as APB DMA?
64K limit is for APBDMA. This patch has APBDMA support only. No GPCDMA support so buf size limit is based on APBDMA. GPCDMA supports upto 1GB.
static const struct i2c_adapter_quirks tegra194_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN,
- .max_write_len = 65535 - I2C_PACKET_HEADER_SIZE,
Ideally it should be SZ_64K - I2C_PACKET_HEADER_SIZE to not miss the one byte, otherwise good to me:
Reviewed-by: Dmitry Osipenko digetx@gmail.com
With SZ_64K - I2C_PACKET_HEADR_Size, When we compute dma_buf_size = max_write_len + I2C_PACKET_HEADER_SIZE, dma_buf_size will be SZ_64K which is 0x10000 apbdma dma count limit should be < 64K meaning 65535 max is allowed
But it's for the GPCDMA, does it have the same 64K limit as APB DMA?
64K limit is for APBDMA. This patch has APBDMA support only. No GPCDMA support so buf size limit is based on APBDMA. GPCDMA supports upto 1GB.
I think dma_buf_size is only for buffer allocation so shouldn’t harm for exact 64K. Will take a look at dma driver...
static const struct i2c_adapter_quirks tegra194_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN,
- .max_write_len = 65535 - I2C_PACKET_HEADER_SIZE,
Ideally it should be SZ_64K - I2C_PACKET_HEADER_SIZE to not miss the one byte, otherwise good to me:
Reviewed-by: Dmitry Osipenko digetx@gmail.com
With SZ_64K - I2C_PACKET_HEADR_Size, When we compute dma_buf_size = max_write_len + I2C_PACKET_HEADER_SIZE, dma_buf_size will be SZ_64K which is 0x10000 apbdma dma count limit should be < 64K meaning 65535 max is allowed
But it's for the GPCDMA, does it have the same 64K limit as APB DMA?
64K limit is for APBDMA. This patch has APBDMA support only. No GPCDMA support so buf size limit is based on APBDMA. GPCDMA supports upto 1GB.
I think dma_buf_size is only for buffer allocation so shouldn’t harm for exact 64K. Will take a look at dma driver...
All msg reads, max length is 65535 All msg writes, max length requests is also limited to 65535 due to u16 type of msg.len So, In any case, we don’t need 65536 bytes.
static const struct i2c_adapter_quirks tegra194_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN,
- .max_write_len = 65535 - I2C_PACKET_HEADER_SIZE,
Ideally it should be SZ_64K - I2C_PACKET_HEADER_SIZE to not miss the one byte, otherwise good to me:
Reviewed-by: Dmitry Osipenko digetx@gmail.com
With SZ_64K - I2C_PACKET_HEADR_Size, When we compute dma_buf_size = max_write_len + I2C_PACKET_HEADER_SIZE, dma_buf_size will be SZ_64K which is 0x10000 apbdma dma count limit should be < 64K meaning 65535 max is allowed
But it's for the GPCDMA, does it have the same 64K limit as APB DMA?
64K limit is for APBDMA. This patch has APBDMA support only. No GPCDMA support so buf size limit is based on APBDMA. GPCDMA supports upto 1GB.
I think dma_buf_size is only for buffer allocation so shouldn’t harm for exact 64K. Will take a look at dma driver...
All msg reads, max length is 65535 All msg writes, max length requests is also limited to 65535 due to u16 type of msg.len So, In any case, we don’t need 65536 bytes. Confused, yeah with max write quirk, max transfer can be 64K.
Will change to 64K instead of 65535.
08.02.2019 21:37, Sowjanya Komatineni пишет:
static const struct i2c_adapter_quirks tegra194_i2c_quirks = { .flags = I2C_AQ_NO_ZERO_LEN,
- .max_write_len = 65535 - I2C_PACKET_HEADER_SIZE,
Ideally it should be SZ_64K - I2C_PACKET_HEADER_SIZE to not miss the one byte, otherwise good to me:
Reviewed-by: Dmitry Osipenko digetx@gmail.com
With SZ_64K - I2C_PACKET_HEADR_Size, When we compute dma_buf_size = max_write_len + I2C_PACKET_HEADER_SIZE, dma_buf_size will be SZ_64K which is 0x10000 apbdma dma count limit should be < 64K meaning 65535 max is allowed
But it's for the GPCDMA, does it have the same 64K limit as APB DMA?
64K limit is for APBDMA. This patch has APBDMA support only. No GPCDMA support so buf size limit is based on APBDMA. GPCDMA supports upto 1GB.
I think dma_buf_size is only for buffer allocation so shouldn’t harm for exact 64K. Will take a look at dma driver...
All msg reads, max length is 65535 All msg writes, max length requests is also limited to 65535 due to u16 type of msg.len So, In any case, we don’t need 65536 bytes. Confused, yeah with max write quirk, max transfer can be 64K.
Will change to 64K instead of 65535.
Good, thank you! Everything else looks good to me.
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