On Tue, Jul 20, 2021 at 10:39:13PM +0530, Sibi Sankar wrote:

The SC7280 SoC supports a 4-Silver/3-Gold/1-Gold+ configuration and hence the cpu7 node should point to cpufreq domain 2 instead.

Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node") Signed-off-by: Sibi Sankar sibis@codeaurora.org Cc: stable@vger.kernel.org

---

arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index a8c274ad74c4..188c5768a55a 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -200,7 +200,7 @@ &BIG_CPU_SLEEP_1 &CLUSTER_SLEEP_0>; next-level-cache = <&L2_700>;

• 	qcom,freq-domain = <&cpufreq_hw 1>;
  

• 	qcom,freq-domain = <&cpufreq_hw 2>;
  #cooling-cells = <2>;
  L2_700: l2-cache {
  	compatible = "cache";
  

Reviewed-by: Matthias Kaehlcke mka@chromium.org