Currently, on the AMD board Asus F2A85-M Pro there is a 100 ms delay as the USB bus of each of the two OHCI PCI devices is reset. As a 50 ms delay is done per the USB specification.
Commit c6187597 (OHCI: final fix for NVIDIA problems (I hope)) unconditionally does the bus reset for all chipsets, while it was only doen for NVIDIA chipsets before.
As it should not be needed for non-NVIDIA chipsets, only do the reset for Nvidia devices.
Tested on Asus F2A85-M PRO and ASRock E350M1. The USB keyboard works and the LUKS passphrase can be e ntered.
Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de Cc: Greg Kroah-Hartman gregkh@linuxfoundation.org Cc: linux-usb@vger.kernel.org Cc: Alan Stern stern@rowland.harvard.edu Cc: linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org --- drivers/usb/host/pci-quirks.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c index 3625a5c1a41b..f6b1a9bbe301 100644 --- a/drivers/usb/host/pci-quirks.c +++ b/drivers/usb/host/pci-quirks.c @@ -784,7 +784,7 @@ static void quirk_usb_handoff_ohci(struct pci_dev *pdev) writel((u32) ~0, base + OHCI_INTRDISABLE);
/* Reset the USB bus, if the controller isn't already in RESET */ - if (control & OHCI_HCFS) { + if ((pdev->vendor == PCI_VENDOR_ID_NVIDIA) && (control & OHCI_HCFS)) { /* Go into RESET, preserving RWC (and possibly IR) */ writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL); readl(base + OHCI_CONTROL);
On Sun, 1 Jul 2018, Paul Menzel wrote:
Currently, on the AMD board Asus F2A85-M Pro there is a 100 ms delay as the USB bus of each of the two OHCI PCI devices is reset. As a 50 ms delay is done per the USB specification.
Commit c6187597 (OHCI: final fix for NVIDIA problems (I hope)) unconditionally does the bus reset for all chipsets, while it was only doen for NVIDIA chipsets before.
I don't follow this at all. Prior to that commit, the bus reset (i.e.,
writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
) was performed unconditionally for _all_ controllers. (However, the 50-ms delay was used only for NVIDIA hardware.) Following that commit, the reset is performed for all controllers, but only if the HCFS bitfield is nonzero.
As it should not be needed for non-NVIDIA chipsets, only do the reset for Nvidia devices.
Therefore this reasoning is wrong.
Tested on Asus F2A85-M PRO and ASRock E350M1. The USB keyboard works and the LUKS passphrase can be e ntered.
Unfortunately, there is a wide variety of OHCI controller hardware available. Something that works on one or two controllers might not work on another.
Besides, doesn't it seem like a bad idea to reset the controller while leaving devices on the USB bus in whatever state they happened to be?
Alan Stern
Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de Cc: Greg Kroah-Hartman gregkh@linuxfoundation.org Cc: linux-usb@vger.kernel.org Cc: Alan Stern stern@rowland.harvard.edu Cc: linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org
drivers/usb/host/pci-quirks.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c index 3625a5c1a41b..f6b1a9bbe301 100644 --- a/drivers/usb/host/pci-quirks.c +++ b/drivers/usb/host/pci-quirks.c @@ -784,7 +784,7 @@ static void quirk_usb_handoff_ohci(struct pci_dev *pdev) writel((u32) ~0, base + OHCI_INTRDISABLE); /* Reset the USB bus, if the controller isn't already in RESET */
- if (control & OHCI_HCFS) {
- if ((pdev->vendor == PCI_VENDOR_ID_NVIDIA) && (control & OHCI_HCFS)) { /* Go into RESET, preserving RWC (and possibly IR) */ writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL); readl(base + OHCI_CONTROL);
linux-stable-mirror@lists.linaro.org
-
Alan Stern -
Paul Menzel