This is a note to let you know that I've just added the patch titled

iio: adc: ti-ads8344: properly byte swap value

to my staging git tree which can be found at git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git in the staging-linus branch.

The patch will show up in the next release of the linux-next tree (usually sometime within the next 24 hours during the week.)

The patch will hopefully also be merged in Linus's tree for the next -rc kernel release.

If you have any questions about this process, please let me know.

From dd7de4c0023e7564cabe39d64b2822a522890792 Mon Sep 17 00:00:00 2001

From: Alexandre Belloni alexandre.belloni@bootlin.com Date: Thu, 16 Apr 2020 22:54:27 +0200 Subject: iio: adc: ti-ads8344: properly byte swap value

The first received byte is the MSB, followed by the LSB so the value needs to be byte swapped.

Also, the ADC actually has a delay of one clock on the SPI bus. Read three bytes to get the last bit.

Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips") Signed-off-by: Alexandre Belloni alexandre.belloni@bootlin.com Cc: Stable@vger.kernel.org Signed-off-by: Jonathan Cameron Jonathan.Cameron@huawei.com --- drivers/iio/adc/ti-ads8344.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/adc/ti-ads8344.c b/drivers/iio/adc/ti-ads8344.c index 9a460807d46d..abe4b56c847c 100644 --- a/drivers/iio/adc/ti-ads8344.c +++ b/drivers/iio/adc/ti-ads8344.c @@ -29,7 +29,7 @@ struct ads8344 { struct mutex lock;

u8 tx_buf ____cacheline_aligned; - u16 rx_buf; + u8 rx_buf[3]; };

#define ADS8344_VOLTAGE_CHANNEL(chan, si) \ @@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel,

udelay(9);

- ret = spi_read(spi, &adc->rx_buf, 2); + ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf)); if (ret) return ret;

- return adc->rx_buf; + return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7; }

static int ads8344_read_raw(struct iio_dev *iio,