On Thu, 12 Jun 2025 00:47:47 +0300, Cristian Ciocaltea wrote:
As with the RK3588 SoC, RK3576 also allows the use of HDMI PHY PLL as an alternative and more accurate pixel clock source for VOP2.
Document the optional PLL clock property.
Moreover, given that this is part of a series intended to address some recent display problems, provide the appropriate tags to facilitate backporting.
Fixes: c3b7c5a4d7c1 ("dt-bindings: display: vop2: Add rk3576 support") Cc: stable@vger.kernel.org Signed-off-by: Cristian Ciocaltea cristian.ciocaltea@collabora.com
.../bindings/display/rockchip/rockchip-vop2.yaml | 56 +++++++++++++++++----- 1 file changed, 44 insertions(+), 12 deletions(-)
Reviewed-by: Rob Herring (Arm) robh@kernel.org