A signed feature value is truncated to turn to an unsigned value causing bad state in the system wide infrastructure. This affects the discovery of FP/ASIMD support on arm64. Fix this by making sure we cast it properly.
This was inadvertently fixed upstream in v4.6 onwards with the following : commit 28c5dcb22f90113dea ("arm64: Rename cpuid_feature field extract routines")
Cc: stable@vger.kernel.org # v4.4 Cc: Will Deacon will@kernel.org Cc: Mark Rutland mark.rutland@arm.com Cc: Catalin Marinas catalin.marinas@arm.com Signed-off-by: Suzuki K Poulose suzuki.poulose@arm.com --- arch/arm64/include/asm/cpufeature.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 0a66f8241f18..9eb0d8072dd9 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -151,8 +151,8 @@ static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp) static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val) { return ftrp->sign ? - cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) : - cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width); + (s64)cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) : + (s64)cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width); }
static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)