From: Florian Fainelli f.fainelli@gmail.com
[ Upstream commit 133bf7b4fbbe58cff5492e37e95e75c88161f1b8 ]
Avoid a forward declaration by moving the callers of bcm54xx_config_clock_delay() below its body.
Signed-off-by: Florian Fainelli f.fainelli@gmail.com Reviewed-by: Vladimir Oltean olteanv@gmail.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/net/phy/broadcom.c | 74 +++++++++++++++++++------------------- 1 file changed, 36 insertions(+), 38 deletions(-)
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 739efcce6dd5..88e9708e0562 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c @@ -26,44 +26,6 @@ MODULE_DESCRIPTION("Broadcom PHY driver"); MODULE_AUTHOR("Maciej W. Rozycki"); MODULE_LICENSE("GPL");
-static int bcm54xx_config_clock_delay(struct phy_device *phydev); - -static int bcm54210e_config_init(struct phy_device *phydev) -{ - int val; - - bcm54xx_config_clock_delay(phydev); - - if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) { - val = phy_read(phydev, MII_CTRL1000); - val |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER; - phy_write(phydev, MII_CTRL1000, val); - } - - return 0; -} - -static int bcm54612e_config_init(struct phy_device *phydev) -{ - int reg; - - bcm54xx_config_clock_delay(phydev); - - /* Enable CLK125 MUX on LED4 if ref clock is enabled. */ - if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) { - int err; - - reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0); - err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0, - BCM54612E_LED4_CLK125OUT_EN | reg); - - if (err < 0) - return err; - } - - return 0; -} - static int bcm54xx_config_clock_delay(struct phy_device *phydev) { int rc, val; @@ -105,6 +67,42 @@ static int bcm54xx_config_clock_delay(struct phy_device *phydev) return 0; }
+static int bcm54210e_config_init(struct phy_device *phydev) +{ + int val; + + bcm54xx_config_clock_delay(phydev); + + if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) { + val = phy_read(phydev, MII_CTRL1000); + val |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER; + phy_write(phydev, MII_CTRL1000, val); + } + + return 0; +} + +static int bcm54612e_config_init(struct phy_device *phydev) +{ + int reg; + + bcm54xx_config_clock_delay(phydev); + + /* Enable CLK125 MUX on LED4 if ref clock is enabled. */ + if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) { + int err; + + reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0); + err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0, + BCM54612E_LED4_CLK125OUT_EN | reg); + + if (err < 0) + return err; + } + + return 0; +} + /* Needs SMDSP clock enabled via bcm54xx_phydsp_config() */ static int bcm50610_a0_workaround(struct phy_device *phydev) {