On Mon, May 20, 2019 at 07:23:55PM +0200, Andrea Parri wrote:
These barriers only apply to the read-modify-write operations; in particular, they do not apply to the atomic_set() primitive.
Replace the barriers with smp_mb()s.
Fixes: b1fc2839d2f92 ("drm/msm: Implement preemption for A5XX targets") Cc: stable@vger.kernel.org Reported-by: "Paul E. McKenney" paulmck@linux.ibm.com Reported-by: Peter Zijlstra peterz@infradead.org Signed-off-by: Andrea Parri andrea.parri@amarulasolutions.com Cc: Rob Clark robdclark@gmail.com Cc: Sean Paul sean@poorly.run Cc: David Airlie airlied@linux.ie Cc: Daniel Vetter daniel@ffwll.ch Cc: Jordan Crouse jcrouse@codeaurora.org Cc: linux-arm-msm@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org Cc: "Paul E. McKenney" paulmck@linux.ibm.com Cc: Peter Zijlstra peterz@infradead.org
I'll go ahead and ack this - I'm not super clued in on atomic barriers, but this seems to be in the spirit of what we are trying to do to protect the atomic value. Rob can disagree, of course.
Acked-by: Jordan Crouse jcrouse@codeaurora.org
drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c index 3d62310a535fb..ee0820ee0c664 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c @@ -39,10 +39,10 @@ static inline void set_preempt_state(struct a5xx_gpu *gpu, * preemption or in the interrupt handler so barriers are needed * before... */
- smp_mb__before_atomic();
- smp_mb(); atomic_set(&gpu->preempt_state, new); /* ... and after*/
- smp_mb__after_atomic();
- smp_mb();
} /* Write the most recent wptr for the given ring into the hardware */ -- 2.7.4