On 06/08/2019 02:42, Bjorn Andersson wrote:
Despite extensive testing of 885bd765963b ("phy: qcom-qmp: Correct READY_STATUS poll break condition") I failed to conclude that the PHYSTATUS bit of the PCS_STATUS register used in PCIe and USB3 falls as the PHY gets ready. Similar to the prior bug with UFS the code will generally get past the check before the transition and thereby "succeed".
Correct the name of the register used PCIe and USB3 PHYs, replace mask_pcs_ready with a constant expression depending on the type of the PHY and check for the appropriate ready state.
Cc: stable@vger.kernel.org Cc: Vivek Gautam vivek.gautam@codeaurora.org Cc: Evan Green evgreen@chromium.org Cc: Niklas Cassel niklas.cassel@linaro.org Reported-by: Marc Gonzalez marc.w.gonzalez@free.fr Fixes: 885bd765963b ("phy: qcom-qmp: Correct READY_STATUS poll break condition") Signed-off-by: Bjorn Andersson bjorn.andersson@linaro.org
drivers/phy/qualcomm/phy-qcom-qmp.c | 33 ++++++++++++++--------------- 1 file changed, 16 insertions(+), 17 deletions(-)
FWIW, for msm8998:
Tested-by: Marc Gonzalez marc.w.gonzalez@free.fr
Regards.