From: Linus Torvalds
Sent: 27 March 2022 06:21
On Sat, Mar 26, 2022 at 10:06 PM Linus Torvalds torvalds@linux-foundation.org wrote:
On Sat, Mar 26, 2022 at 8:49 PM Halil Pasic pasic@linux.ibm.com wrote:
I agree it CPU modified buffers *concurrently* with DMA can never work, and I believe the ownership model was conceived to prevent this situation.
But that just means that the "ownership" model is garbage, and cannot handle this REAL LIFE situation.
Just to clarify: I obviously agree that the "both sides modify concurrently" obviously cannot work with bounce buffers.
Aren't bounce buffers just a more extreme case on non-coherent memory accesses? They just need explicit memory copies rather than just cache writeback and invalidate operations.
So 'both sides modify concurrently' just has the same issue as it does with non-coherent memory in that the locations need to be in separate (dma) cache lines. Indeed, if the bounce buffers are actually coherent then arbitrary concurrent updates are possible.
One issue is that the driver needs to indicate which parts of any buffer are dirty. Whereas the any 'cache writeback' request will only write dirty data.
Get everything right and you can even support hardware where the 'bounce buffers' are actually on the card and the copies are MMIO (or better, especially on PCIe, synchronous host initiated dma transfers).
David
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