Re: bisected: [PATCH V4] x86/apic: Always explicitly disarm TSC-deadline timer

On (24/11/28 20:18), Sergey Senozhatsky wrote:

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Disable the TSC Deadline timer in lapic_timer_shutdown() by writing to MSR_IA32_TSC_DEADLINE when in TSC-deadline mode. Also avoid writing to the initial-count register (APIC_TMICT) which is ignored in TSC-deadline mode.

Upstream commit ffd95846c6ec6cf1f93da411ea10d504036cab42 (forgot to mention)