The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 8249d17d3194eac064a8ca5bc5ca0abc86feecde Gitweb: https://git.kernel.org/tip/8249d17d3194eac064a8ca5bc5ca0abc86feecde Author: Isaku Yamahata isaku.yamahata@intel.com AuthorDate: Thu, 18 Mar 2021 13:26:57 -07:00 Committer: Borislav Petkov bp@suse.de CommitterDate: Tue, 23 Mar 2021 11:59:45 +01:00
x86/mem_encrypt: Correct physical address calculation in __set_clr_pte_enc()
The pfn variable contains the page frame number as returned by the pXX_pfn() functions, shifted to the right by PAGE_SHIFT to remove the page bits. After page protection computations are done to it, it gets shifted back to the physical address using page_level_shift().
That is wrong, of course, because that function determines the shift length based on the level of the page in the page table but in all the cases, it was shifted by PAGE_SHIFT before.
Therefore, shift it back using PAGE_SHIFT to get the correct physical address.
[ bp: Rewrite commit message. ]
Fixes: dfaaec9033b8 ("x86: Add support for changing memory encryption attribute in early boot") Signed-off-by: Isaku Yamahata isaku.yamahata@intel.com Signed-off-by: Borislav Petkov bp@suse.de Reviewed-by: Kirill A. Shutemov kirill.shutemov@linux.intel.com Reviewed-by: Tom Lendacky thomas.lendacky@amd.com Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/81abbae1657053eccc535c16151f63cd049dcb97.161609829... --- arch/x86/mm/mem_encrypt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index 4b01f7d..ae78cef 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -262,7 +262,7 @@ static void __init __set_clr_pte_enc(pte_t *kpte, int level, bool enc) if (pgprot_val(old_prot) == pgprot_val(new_prot)) return;
- pa = pfn << page_level_shift(level); + pa = pfn << PAGE_SHIFT; size = page_level_size(level);
/*