Mahesh J Salgaonkar mahesh@linux.vnet.ibm.com writes:
From: Mahesh Salgaonkar mahesh@linux.vnet.ibm.com
On pseries, TLB multihit are reported as D-Cache Multihit. This is because the wrongly populated mc_err_types[] array. Per PAPR, TLB error type is 0x04 and mc_err_types[4] points to "D-Cache" instead of "TLB" string. Fixup the mc_err_types[] array.
Machine check error type per PAPR: 0x00 = Uncorrectable Memory Error (UE) 0x01 = SLB error 0x02 = ERAT Error 0x04 = TLB error 0x05 = D-Cache error 0x07 = I-Cache error
Fixes: 8f0b80561f21 ("powerpc/pseries: Display machine check error details.") Cc: stable@vger.kernel.org # v4.19+ Reported-by: Aneesh Kumar K.V aneesh.kumar@linux.ibm.com Signed-off-by: Mahesh Salgaonkar mahesh@linux.vnet.ibm.com
arch/powerpc/platforms/pseries/ras.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index d97d52772789..452dcfd7e5dd 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c @@ -550,6 +550,7 @@ static void pseries_print_mce_info(struct pt_regs *regs, "UE", "SLB", "ERAT",
"Unknown",
It seems like we might have avoided the bug if we'd numbered them from the start, eg.
static const char * const mc_err_types[] = { [0] = "UE", [1] = "SLB", [2] = "ERAT", [3] = "Unknown", [4] = "TLB", [5] = "D-Cache", [6] = "Unknown", [7] = "I-Cache", };
cheers