6.7-stable review patch. If anyone has any objections, please let me know.
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From: Konrad Dybcio konrad.dybcio@linaro.org
[ Upstream commit 78403b37f6770441f80a78d13772394731afe055 ]
Duplicated clock output names cause probe errors and wrong clocks cause hardware not to work. Fix such issues.
Fixes: d20b6c84f56a ("arm64: dts: qcom: sc8180x: Add PCIe instances") Signed-off-by: Konrad Dybcio konrad.dybcio@linaro.org Link: https://lore.kernel.org/r/20231219-topic-8180_pcie-v1-1-c2acbba4723c@linaro.... Signed-off-by: Bjorn Andersson andersson@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index 59ab5428348d..b5eb84287870 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -1762,7 +1762,7 @@ pcie0_phy: phy@1c06000 { clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, <&gcc GCC_PCIE_0_CFG_AHB_CLK>, <&gcc GCC_PCIE_0_CLKREF_CLK>, - <&gcc GCC_PCIE1_PHY_REFGEN_CLK>, + <&gcc GCC_PCIE0_PHY_REFGEN_CLK>, <&gcc GCC_PCIE_0_PIPE_CLK>; clock-names = "aux", "cfg_ahb", @@ -1860,7 +1860,7 @@ pcie3_phy: phy@1c0c000 { clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, <&gcc GCC_PCIE_3_CFG_AHB_CLK>, <&gcc GCC_PCIE_3_CLKREF_CLK>, - <&gcc GCC_PCIE2_PHY_REFGEN_CLK>, + <&gcc GCC_PCIE3_PHY_REFGEN_CLK>, <&gcc GCC_PCIE_3_PIPE_CLK>; clock-names = "aux", "cfg_ahb", @@ -2066,7 +2066,7 @@ pcie2_phy: phy@1c1c000 { "refgen", "pipe"; #clock-cells = <0>; - clock-output-names = "pcie_3_pipe_clk"; + clock-output-names = "pcie_2_pipe_clk";
#phy-cells = <0>;